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Job Details:

Job Description:

The Role and Impact As a Systems Integration Validation Engineer, you will play a key role in ensuring the seamless integration and compatibility of hardware and software components within Intel systems. You will define, develop, and execute validation plans for PC, Edge and Physical AI client segments, identifying and resolving issues through system-level testing from prototype to production. Your work will directly contribute to improving system performance and reliability, driving innovation for next-generation Intel products. Business group At Intel Corporation, our engineering teams are dedicated to creating cutting-edge technological solutions that power the future of computing. The Platform Validation group focuses on ensuring robust performance and compatibility across Intel systems. By collaborating with cross-functional teams, we strive to optimize systems that support Intel's broader mission to deliver transformative products to customers worldwide. Key Responsibilities - Develop and implement validation plans for system-level integration to ensure compatibility and performance requirements are met. - Review system requirements and translate them into effective integration test plans. - Execute test plans, analyze results, and provide detailed feedback to design and architecture teams. - Identify and resolve defects through system-level troubleshooting and root cause analysis. - Drive improvements in system performance by collaborating with cross-functional engineering teams. - Research best practices for system integration and validation tools, incorporating findings into validation processes. - Act as a point of contact for platform issues, liaising with product development engineers and customers.

Qualifications:

Minimum Qualifications - Bachelor's degree in a relevant field (e.g., Electrical Engineering, Computer Science, or related discipline) and 6+ years of experience in system-level integration and validation OR Master's degree in a relevant field with 4+ years of experience OR PhD in a relevant field with 2+ years of experience. - Proficiency in system-level troubleshooting, including defect identification and root cause analysis. - Experience developing and executing integration test plans for hardware and software systems. - Strong analytical skills with the ability to assess system performance and margin requirements. - Familiarity with validation tools and methodologies for system-level testing. Preferred Qualifications - Demonstrated ability to collaborate across teams, including architecture, design, silicon, firmware, and applications engineering. - Experience with platform bring-up and addressing complex integration challenges. - Strong communication skills with the ability to present findings and recommendations effectively. - Passion for driving innovation and improving system reliability and performance. If you're ready to contribute your expertise to shaping the future of Intel products while growing your career in a dynamic and collaborative environment, we encourage you to apply today.

Job Type:

Experienced Hire

Shift:

Shift 1 (India)

Primary Location:

India, Bangalore

Additional Locations:

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

Job Details:

Job Description:

About the Team

Manufacturing Development and Customer Engineering (MDCE) serves as the critical bridge between Technology Development (TD) and High Volume Manufacturing (HVM) within Intel Foundry. The organization is responsible for transitioning leading-edge technologies from development and qualification into high-yield production while enabling successful deployment for foundry customers.

The MDCE Device Team is expanding its 3DIC device engineering capabilities and is seeking an experienced engineer to drive device understanding and optimization for advanced 3D integration technologies.

Position Overview

As a 3DIC Device Development Engineer, you will be responsible for understanding, characterizing, and modeling the impact of advanced 3D integration technologies on transistor and passive device performance. Technologies such as through-silicon vias (TSVs), hybrid bonding, active base die architectures, wafer thinning, and backside power delivery introduce new mechanical, thermal, and electrical interactions that influence device behavior, variability, and reliability.

In this role, you will transform complex silicon data into actionable insights, design rules, device collateral, and customer-ready guidance that support next-generation products including AI accelerators, high-performance computing solutions, and high-bandwidth memory (HBM) platforms.

Key Responsibilities

Responsibilities include, but are not limited to:

Characterize and model the impact of advanced 3D integration technologies, including TSVs, hybrid bonding, wafer thinning, and backside processing, on device performance metrics such as mobility, threshold voltage (Vt), leakage, matching, and variability.

Evaluate stress, thermal, and electrical coupling effects, including keep-out zone (KOZ) behavior and device interactions within complex 3D stacks.

Define and develop device and passive test structures to study 3DIC effects, including TSV proximity, KOZ, guard ring, resistor, and capacitor structures.

Drive electrical test (e-test) strategy, data collection, and silicon analysis to accelerate technology learning and optimization.

Provide device characterization inputs that enable design rule development, compact models, PDKs, and 3D design kit releases in collaboration with Design Enablement teams.

Partner closely with Process Integration, Packaging, Assembly, Reliability, Yield, and Program Management organizations to identify, troubleshoot, and resolve device-related issues.

Evaluate customer requirements for analog, mixed-signal, RF, and high-speed I/O devices within 3D architectures, assessing technical feasibility, risk, and implementation timelines.

Support technology qualification and manufacturing readiness activities, including device targeting, monitoring strategies, yield improvement efforts, and excursion management.

Communicate complex technical findings and recommendations to engineering, business, and customer stakeholders.

What We Are Looking For

The successful candidate will demonstrate:

Deep understanding of CMOS device physics and the impact of process, stress, and thermal effects on device performance.

Strong analytical and problem-solving skills, including data science, statistical analysis, and scripting capabilities.

Excellent written and verbal communication skills with the ability to explain complex technical concepts to diverse audiences.

Proven ability to influence and collaborate across device, process, packaging, manufacturing, and design organizations.

Strong ownership mindset, technical curiosity, and a passion for developing innovative solutions in advanced semiconductor technologies.

Qualifications:

The Minimum qualifications are required to be initially considered for this position. Minimum qualifications listed below would be obtained through a combination of industry relevant job experience, internship experience and / or schoolwork/classes/research. The preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications

Master's degree in Electrical Engineering, Physics, Materials Science, or a related field with 4+ years of industry experience, in semiconductor device engineering, process integration, advanced packaging, or related technology development.

3+ years of experience in advanced CMOS device characterization and electrical parametric (e-test) data analysis.

Hands-on experience with one or more advanced packaging and 3D integration technologies, including:
- Through-silicon vias (TSVs)
- Hybrid bonding

- Wafer-to-wafer or die-to-wafer bonding

- Micro-bump technologies

- Wafer thinning

- Backside power delivery

Preferred Qualifications

PhD in Electrical Engineering, Physics, Materials Science, or a related field.

Experience analyzing stress and thermal interactions affecting device behavior, including TSV keep-out zones and chip-package interaction effects.

Expertise in test structure development, design of experiments (DOE), and e-test program implementation.

Knowledge of device modeling, design rule development, PDK generation, or design technology co-optimization (DTCO).

Experience using TCAD and/or finite element analysis tools for stress, thermal, or device simulations.

Understanding of semiconductor reliability mechanisms, including electromigration (EM), time-dependent dielectric breakdown (TDDB), bias temperature instability (BTI), and bonding interface reliability.

Experience with advanced node technologies, including FinFET and Gate-All-Around (GAA) devices.

Semiconductor foundry experience with direct customer engagement and technical support.

Experience supporting technology transfer and production ramp in high-volume manufacturing environments.

Join us in shaping the future of semiconductor innovation through advanced 3D integration technologies that enable the next generation of AI, HPC, and memory solutions.

Job Type:

Experienced Hire

Shift:

Shift 1 (United States of America)

Primary Location:

US, Oregon, Hillsboro

Additional Locations:

US, Arizona, Phoenix, US, California, Santa Clara

Posting Statement:

Position of Trust

N/A

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.

Annual Salary Range for jobs which could be performed in the US: $136,900.00-269,150.00 USD

The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

Work Model for this Role

Job Details:

Job Description:

Intel Ireland Device Engineering team (Yield department) is looking for Device Engineering talents (reporting to manger of Device team) to join our advanced technology Fab.

As a Device Engineer/Senior Device Engineer, you will focus on most advanced FinFETs technology device engineering/development working closely with Integration, Module, yield teams to achieve yield ramp-up, process and device optimization in the high-volume manufacturing Fab, supporting internal and external customers.

Device engineers' responsibilities include (but are not limited to):

Drive factory product Power and Performance roadmap and member/leader of the Performance TMI team to ensure the factory products hit customer specifications required, including device targeting, customization, variability improvement etc.
Own engineering projects to execute HVM yield roadmap, device targeting and attain performance targets.
Work with Technology Development team to develop new device technology, customize device architecture per customer request and import to production fabs.
Participate or lead cross-organizational team of engineers to identify root cause of device-related yield/performance issues and define mitigation plan to meet committed production yield/performance targets.
Own NPI (New Product Introduction) in production fab and perform device-related process optimizations to meet foundry customers product specifications and requirements.
Develop a model to predict device performance accurately in early-to-mid stage of Si progression and drive systematic solution to maintain baseline device performance.
Work with Process Integration engineers to drive process simplification and implement cost reduction engineering opportunities in line.
Level of experience will be considered in determining applicants job grade.

Qualifications:

Skills Required:

- Problem Solving: Demonstrated experience in rapidly analyzing complex process problems and identifying effective solution paths.
- Teamwork and Partnership: Strong teamwork skills and the ability to build effective partnerships.
- Communication: Excellent written and verbal communication skills, with the ability to summarize and communicate information effectively to influence action at all levels.
- Self-Motivation: A motivated self-starter with the ability to work independently as well as collaboratively in a team environment.
- Flexibility: Maturity and adaptability in facing uncertainties and changing priorities or responsibilities.
- Goal Commitment: Commitment to achieving aggressive goals with a positive, can-do attitude and ability to act with velocity and a strong sense of urgency.

Qualifications:
Minimum Qualifications:

- Relevant Bachelors, Masters and/or a PhD degree in Device physics, Electronics, physics chemistry or related technical field.
- 5-10 years' experience in advanced node semiconductor industry in Device or FEOL/BEOL Integration.
- 5-10 years' experience in FinFET technology development or high-volume manufacturing.
- 5-10 years' experience with Device Physics and hands-on application in real-world fab environment.

Preferred Qualifications:

- Advanced degree (Master's or Ph.D.) in Electrical Engineering, Physics or Materials Science major.
- Experience driving product performance roadmaps working in multi discipline team with Process Engineers, Integration Engineers and Yield Analysis to deliver reliable, cost effective and stable/capable products.
- Experience working on process transfers to High Volume Manufacturing Factories, solving complex integrated issues delivering matched yields and product performance.
- Demonstrated interpersonal skills including influencing, engaging, and motivating.
- Experience in serving external Foundry customers through technical interactions.
- Experience in GAA (Gate-All-Around) technology architecture.
- Experience in new semiconductor technology development.
- Basic understanding and collaboration experience with module processes including lithography, dry etch, wet etch, CMP, diffusion, implant, thin films and metrology.

Job Type:

Experienced Hire

Shift:

Shift 1 (Ireland)

Primary Location:

Ireland, Leixlip

Additional Locations:

Posting Statement:

Position of Trust

N/A

EU Salary

We offer a total compensation package that ranks among the best in the industry.

Annual Salary Range for this job which could be performed in Ireland is: ‏85,700.00 € - ‏133,900.00 €

The compensation range displayed in this posting reflects the minimum and maximum target compensation for this position. Within this range, individual pay is determined by job related skills, experience, and relevant education, training. As part of our total compensation approach, the final offer may include additional pay components and benefits. Your recruiting team will share the confirmed base salary along with any applicable total compensation elements upon employment offer delivery.

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

93:T20b0,

Job Details:

Job Description:

The Role and Impact

Foundry Business Group Operations is seeking a highly analytical and strategic Senior Sales Operations Analyst to support forecasting, demand planning, and business operations for Intel Foundry customers. This role serves as a critical bridge between Business Development, Supply Chain, Manufacturing, and Finance, ensuring customer demand signals are translated into actionable business insights and operational plans.

As a key member of the Foundry Sales Operations team, you will drive forecast accuracy, demand visibility, and data-driven decision making across the sales lifecycle. You will analyze customer demand trends, identify business risks and opportunities, and partner with stakeholders to optimize capacity allocation, inventory strategies, and revenue attainment.

The ideal candidate combines strong analytical capabilities, semiconductor industry knowledge, and business acumen to influence strategic planning and operational execution. This role will also act as the primary operations interface for Front-End (FE) Wafer demand planning and forecasting activities supporting Intel Foundry customers.

Key Responsibilities

demand planning and forecasting processes for Intel Foundry customers, translating customer demand signals into actionable business plans.
Manage production demand forecasting using Blue Yonder CDP and engineering demand planning within SAP IBP.
Lead forecast reviews and demand planning cycles, ensuring alignment across Business Development, Strategy, Supply Chain, Manufacturing, and Finance stakeholders.
Partner with Business Development teams to establish forecasting readiness for new products, including product setup, demand assumptions, and lifecycle planning.
Support Sales and Operations Planning (S&OP) and Long-Range Planning (LRP) processes by developing data-driven demand scenarios and identifying planning assumptions, risks, and opportunities.
Analyze customer forecasts, historical trends, market conditions, and demand patterns to improve forecast accuracy and business predictability.
Develop executive-level reporting and dashboards that provide visibility into demand, capacity utilization, inventory health, and revenue opportunities.
Monitor forecast performance, including forecast accuracy, bias, and lag indicators, and recommend corrective actions.
Collaborate with Supply Chain and Manufacturing teams to align demand forecasts with available capacity, inventory strategies, and supply commitments.
Partner with Customer Business Analysts to maintain accurate customer rolling forecasts and demand visibility.
Strong stakeholder management and cross-functional collaboration skills.
Identify operational constraints, capacity gaps, and customer fulfillment risks, proactively driving mitigation strategies.
Support new product introductions (NPI), engineering builds, high-volume manufacturing (HVM) ramps, and customer milestone execution.
Drive continuous improvement initiatives that enhance forecasting methodologies, planning processes, data quality, and operational efficiency.

Qualifications:

Minimum Qualifications

Bachelor's degree in Business, Supply Chain Management, Engineering, Finance, Operations, Bachelor of Arts or in a similar field.
6+ years of experience in Sales Operations, Demand Planning, Supply Chain Analytics, Business Planning, or Capacity Planning within semiconductor or advanced manufacturing environments.
6+ years of experience supporting forecasting, planning, or business operations processes.
Experience with Sales and Operations Planning (S&OP), Integrated Business Planning (IBP), or related planning methodologies.
Proficiency with ERP and planning systems such as SAP IBP, Blue Yonder, or similar enterprise planning tools.
Advanced Excel skills, including complex modeling, forecasting, data analysis, and reporting.
Experience analyzing large data sets and translating findings into actionable business recommendations.

Preferred Qualifications

Post graduate degree in Business, Supply Chain Management, Engineering, Finance/MBA, Operations, Bachelor of Arts or in a similar field.
Experience supporting semiconductor wafer manufacturing, foundry operations, or advanced technology development organizations.
Working knowledge of semiconductor supply chains, wafer fabrication operations, and capacity planning methodologies.
Experience developing executive dashboards and business insights using Power BI, Tableau, or similar analytics platforms.
Experience communicating and presenting to executives, with the ability to influence decisions through data-driven storytelling.
Proven track record of driving process improvements and operational excellence initiatives.
Experience managing planning activities across NPI, engineering, and high-volume manufacturing environments.

Why Intel Foundry

Join Intel's Foundry Business Group and play a pivotal role in helping scale one of the world's most ambitious semiconductor manufacturing organizations. You will work across sales, operations, supply chain, and manufacturing functions to shape strategic decisions, improve customer outcomes, and enable Intel Foundry's continued growth and success

Job Type:

Experienced Hire

Shift:

Shift 1 (United States of America)

Primary Location:

US, California, Santa Clara

Additional Locations:

US, Arizona, Phoenix, US, California, Folsom, US, Oregon, Hillsboro

Posting Statement:

Position of Trust

N/A

Benefits

Annual Salary Range for jobs which could be performed in the US: $140,230.00-237,710.00 USD

Work Model for this Role

Job Details:

Job Description:

The Role and Impact

As a Technical Engineer, you will play a key role in developing, validating, and optimizing High Speed Interfaces (HSIO) such PCIe and UCIe for Intel's Xeon D platform. You will collaborate with cross-functional teams to ensure seamless integration, performance reliability, and quality assurance across hardware and software components.

Your contributions will directly enhance Intel's data center solutions, advancing innovation in cloud and networking technologies.

This is a Temporary position (24 months).

Business group

This position is part of Intel's Data Center Group (DCG), which drives advancements in computing and connectivity for data centers and enterprise environments.

The team focuses on delivering high-performance, scalable solutions for networking, storage, and cloud platforms, supporting Intel's mission to empower businesses with cutting-edge technology.

Key Responsibilities

Execute and track electrical validation test plan strategies of the Analog Front End (AFE) and end-to-end interconnections across Intel Xeon D platforms.
Perform test setups and configurations for interfaces such as HSIO (UCIe, PCIe). Across link speeds ranging from: 2.5G, 5G, 8G, 16G, and up to 64G, including NRZ and PAM4 signaling.
Validate conformance to industry standards and Intel specifications.
Apply Intel developed validation disciplines, including:
Signal Integrity (SI) Validation
System Marginality Validation
Develop debug documentation with lab experiences during execution and system issues resolution.
Investigate and support resolution of complex issues involving hardware, BIOS, firmware, and operating system interactions.
Collaborate with core team and support requests by translating validation results/findings into actionable execution solutions.
Develop and maintain comprehensive testing frameworks to ensure product reliability and scalability.

The ideal candidate should show the following behavioral traits

Excellent communication and teamwork skills to support cross-functional collaborations.
Strong analytical and problem-solving skills.

Qualifications:

Minimum qualifications, you must possess the below minimum qualifications to be initially considered for this position.

Bachelor's degree in electrical engineering, Computer Engineering, or a related field.

1+ year of experience in hardware validation, including experience gained through internships, university projects, coursework, laboratory work, or hands-on training, with a focus on:

- Signal integrity, electronic circuit analysis, and data analysis techniques.
- System Validation, electronic circuit analysis, and data analysis techniques.

Intermediate to advanced English level.

Must have unrestricted, permanent right to work in Mexico (this role is not eligible for visa or immigration sponsorship).

Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Master's degree in electrical engineering, Computer Engineering, or a related field.
Experience working with HSIO (PCIe or UCIe).
Experience validating high speed interfaces.
Proficiency in PCIe/UCIe configurations and technologies.
Familiarity with debugging tools and validation methodologies.
Familiarity with Bit Error Rate testers and high bandwidth oscilloscopes.
Familiarity with AFE validation and end to end system validation.
Knowledge of system level validation spanning silicon, platform, and software layers.

Join us to play a vital role in empowering our teams to achieve excellence. Contribute your skills to a global leader in technology and help shape the future of the data center and networking solutions.

Job Type:

Intel Contract Employee

Shift:

Shift 1 (Mexico)

Primary Location:

Mexico, Guadalajara

Additional Locations:

Posting Statement:

Position of Trust

N/A

Work Model for this Role

Job Details:

Job Description:

The Role and Impact:

As a Silicon Packaging Architect, you will play a pivotal role in translationally directly contribute to advancing Intel's silicon packaging capabilities, ensuring reliability, quality, and innovation in every solution.

Business group:

Join Intel's Data Center Group (DCG), a dynamic organization driving innovation in the design and devg product requirements into advanced package architecture specifications and delivering end-to-end solutions that meet physical, electrical, thermal, and cost requirements. You will lead technology tradeoff decisions, ensuring silicon packages adhere to rigorous standards and collaborate closely with cross-functional teams to drive seamless execution from design to production. Your expertise welopment of cutting-edge technologies that power global data infrastructure. Our team is dedicated to developing scalable solutions for complex workloads, enabling the world's digital transformation and advancing Intel's leadership in high-performance computing.

Key Responsibilities:

- Develop and define package architecture specifications based on product requirements, ensuring alignment with physical, electrical, thermal, and reliability standards.
- Lead technology tradeoff evaluations to deliver optimal solutions that balance performance, manufacturability, and cost.
- Collaborate with silicon, hardware, and packaging teams to ensure high-quality package designs and seamless integration into production workflows.
- Oversee the end-to-end package development process, including design, processes, and procedures, while continuously improving packaging quality standards.
- Troubleshoot packaging design challenges, identify root causes, and implement innovative and cost-effective solutions.
- Partner with manufacturing teams to ensure smooth transitions of packaging designs and tapeouts to production environments.

Qualifications:

Minimum Qualifications:

- Bachelor's degree in a relevant field (e.g., Electrical Engineering, Mechanical Engineering, Materials Science) with 6+ years of hands-on experience in package architecture, design, and development OR a Master's degree in a relevant field with 4+ years of experience OR a PhD in a relevant field with 2+ years of experience.
- Proven expertise in package design and associated design tool SW Xpedition.
- Proven expertise in electrical, thermal, and mechanical considerations and tradeoffs.
- Proficiency in simulation tools for package analysis (e.g., thermal, mechanical, and signal integrity simulations).
- Strong understanding of manufacturing processes and procedures for silicon packaging.
- Demonstrated ability to troubleshoot and resolve packaging design challenges effectively.

Preferred Qualifications:

- Experience collaborating with cross-functional teams, including silicon, hardware, and manufacturing groups.
- Strong communication skills to effectively convey tradeoff decisions and technical solutions.
- Familiarity with industry trends and advancements in silicon packaging technologies.
- Ability to thrive in a fast-paced, innovative environment while driving continuous improvement.

Take the next step in your career by joining a team that empowers innovation, supports collaboration, and drives impactful solutions in the semiconductor industry.

Job Type:

Experienced Hire

Shift:

Shift 1 (India)

Primary Location:

India, Bangalore

Additional Locations:

Posting Statement:

Position of Trust

N/A

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

Job Details:

Job Description:

Contributes to the design, development, and validation of system software across one or more layers of the software stack including firmware, drivers, operating systems, and/or middleware to enable Intel platforms and technologies.
Engages in crossstack software optimization and contributes to reference platform development for specific domains and market segments.
As an intern, learns and applies knowledge, builds skills, and explores future career opportunities through handson experience and projects that support Intel business goals in a collaborative environment.

Qualifications:

Candidates must be currently pursuing or have recently completed a bachelor's degree in computer science, Data Science, Computer Engineering, or a related discipline.
They should possess strong analytical, problem-solving, and communication skills, along with hands-on programming experience in languages such as Angular, Python, SQL, Postgres, C# and Kubernetes.
Knowledge of Agile software development methodologies and experience with manufacturing systems are highly desirable.
Able to commit to a minimum internship period of 3 to 6 months, subject to university/college internship requirements and academic calendar.

Job Type:

Student / Intern

Shift:

Shift 1 (Malaysia)

Primary Location:

Malaysia, Penang

Additional Locations:

Posting Statement:

Position of Trust

N/A

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

Job Details:

Job Description:

The Role and Impact
As a Partner Marketing Manager, you will lead and drive impactful co-marketing initiatives with Intel's strategic partner Microsoft, ensuring alignment with Intel's brand strategies and delivering measurable business results. You will evaluate market trends and competitive programs, manage multi-region campaigns, and guide partners in utilizing Market Development Funds (MDF) effectively. Your expertise will play a critical role in developing metrics to analyze marketing spend and return on investment, empowering Intel and its partners to collaboratively achieve success in the marketplace.
In this role, you will work alongside the Global Field Sales, Business Groups, global and regional marketing, and sales counterparts that are at points of influence throughout the world. You will work directly with partners at Microsoft and build relationships, from mid-level to the most senior managers within their marketing and sales organizations.
This role is responsible for driving strategic decisions that align Microsoft and Intel's global GTM strategies and regional execution engines that materially and measurably contribute to business growth across all segments. In this customer-facing role that must be located in Seattle, WA or Portland, OR, your leadership will be critical to champion the design, activation, iteration, and ongoing measurement of results across key lines of Intel + Microsoft business in consumer, commercial client and data center segments.

Key Responsibilities
- Partner with the sales team to drive an integrated 4P GTM strategy that supports the account team revenue goals
- Drive alignment across the sales and marketing teams at Intel and Microsoft for execution of investment in sales and marketing activities.
- Work with the Microsoft global and regional marketing teams to develop a full-funnel marketing strategy across the entire investment portfolio, driving measurable impact for the business.
- Lead a team of marketers to build co-branded campaigns, custom product messaging integration, and competitive marketing content.
- Direct multi-region and global co-marketing programs and campaigns to jointly sell with partners and Intel's Industry Sales team.
- Develop and oversee partner participation requirements for promotional activities linked to specific products or product lines.
- Evaluate and manage new strategic business opportunities with partners, ensuring alignment with Intel's objectives.
- Monitor competitive partner marketing programs and channel trends, adjusting strategies to optimize performance.
- Ensure all partner marketing communications and content reflect Intel's brand strategies.
- Guide and support partners in utilizing Market Development Funds (MDF), ensuring compliance with guidelines and enabling effective marketing initiatives.
- Drive internal reporting and analyze metrics related to partner marketing spend and return on investment, both at the program level and by key accounts.
- Report key performance metrics to Sales and Marketing leadership, providing actionable insights to drive improvements.
- Inspire and enable teams through goal setting, fostering accountability, and driving differentiated performance management to achieve results.

Qualifications:

Minimum Qualifications
- Bachelor's degree in Marketing, Business Administration, or related field with 8+ years of relevant experience
- 5+ years in a customer facing role in a Global Sales or Marketing organization
- Proven expertise in executing co-marketing programs and campaigns on a global scale.
- Proficiency in analyzing marketing metrics and generating actionable insights.
- Demonstrated ability to manage Market Development Funds (MDF) and partner relationships effectively.
- Strong knowledge of competitive programs, market trends, and channel dynamics.
- Ability to travel at least once per quarter.

Preferred Qualifications
- Excellent communication skills, attention to detail, a strong sense of leadership.
- Experience in building and maintaining strategic relationships with partners and cross-functional teams.
- Ability to lead diverse teams, inspire collaboration, and drive results in a fast-paced environment.
- Strong communication skills with expertise in presenting to senior stakeholders.
- Strategic thinker with a track record of aligning marketing initiatives with broader business goals.

We are excited about the potential you bring to this role and encourage you to apply, contributing your skills and expertise to help shape Intel's success alongside a team of forward-thinking professionals.

Job Type:

Experienced Hire

Shift:

Shift 1 (United States of America)

Primary Location:

Virtual US

Additional Locations:

Posting Statement:

Position of Trust

N/A

Benefits

Annual Salary Range for jobs which could be performed in the US: $175,620.00-247,930.00 USD

Work Model for this Role

This role is available as a fully home-based and generally would require you to attend Intel sites only occasionally based on business need. However, you must live and work from the country specified in the job posting, in which Intel has a legal presence. Due to legal regulations, remote work from any other country is unfortunately not permitted. * Job posting details (such as work model, location or time type) are subject to change.The application window for this job posting is expected to end by 10/22/2026

Job Details:

Job Description:

The Role and Impact As a Module Engineer, you will play a pivotal role in ensuring the seamless operation of high-volume manufacturing equipment and processes that are integral to the production of cutting-edge integrated circuits. You will be responsible for conducting tests, optimizing production techniques, and implementing improvements to ensure safety, quality, and efficiency. Your contributions will directly impact Intel's ability to meet manufacturing goals and deliver industry-leading products to global markets. Business group You will be joining Intel Foundry, a team dedicated to advancing semiconductor manufacturing processes and technologies. This group supports Intel's broader mission of delivering world-class solutions by driving innovation, scaling manufacturing capacity, and ensuring excellence in production quality. Your work will contribute to the development of technologies that empower businesses and industries worldwide. Key Responsibilities - Conduct tests and measurements to ensure control over critical dimensions and defectivity in manufacturing processes. - Implement modifications to equipment and processes to optimize production efficiencies, techniques, and output. - Execute maintenance and repair activities for high-volume manufacturing equipment and associated components. - Develop and optimize systems for excursion prevention and discrepant material detection in equipment and processes. - Own process development and optimization aligned with high-volume process nodes. - Collaborate with equipment suppliers to enhance equipment functionality and performance. - Participate in the transfer of technology to global manufacturing sites, including training and auditing qualifications to ensure process matching across locations. - Manage equipment installation, conversion, and qualification during factory ramps to ensure safety, quality, and readiness. - Drive continuous improvement initiatives for safety, quality, cost, productivity, defects, and yield indicators.

Qualifications:

Minimum Qualifications - Bachelor's degree in a relevant field with at least 3 years of hands-on experience in semiconductor manufacturing processes OR a Master's degree in a relevant field with at least 2 years of experience. - Proficiency in using advanced manufacturing equipment and tools specific to the semiconductor industry. - Familiarity with process control methodologies and data analysis techniques. Preferred Qualifications - Strong problem-solving and analytical skills with a focus on continuous improvement strategies. - Experience in high-volume manufacturing environments and collaborating across global teams. - Excellent communication and collaboration skills to effectively work with cross-functional teams and external partners. Step into a role where your expertise will drive innovation and excellence in manufacturing. Join us to shape the future of semiconductor technology and make a tangible impact in the global tech landscape.

Job Type:

Experienced Hire

Shift:

Shift 1 (China)

Primary Location:

PRC, Chengdu

Additional Locations:

Posting Statement:

Position of Trust

N/A

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

Job Details:

Job Description:

The Role and Impact As a SoC Design Verification Engineer at Intel, you will be responsible for performing functional logic verification of integrated System-on-Chip (SoC) designs to ensure they meet specifications and are ready for production. You will develop scalable and reusable verification plans, test benches, and environments, and play a key role in identifying and resolving issues to ensure the highest quality designs. Your work will directly contribute to delivering cutting-edge technology for Intel's next-generation Client CPU SoC solutions. Business Group You will be part of Intel's Design Engineering Group (DEG), which is focused on designing and verifying high-performance, power-efficient computing solutions. The team supports Intel's mission to shape the future of technology by driving innovation across the Semiconductor industry. Joining this group means becoming part of a collaborative environment that fosters creativity and continuous improvement while contributing to Intel's broader goals in hyper-scale computing and innovation. Key Responsibilities - Define and develop scalable and reusable block, subsystem, and SoC verification plans, test benches, and verification environments. - Execute verification plans, including emulation and system simulation models, to verify designs and analyze power/performance while identifying and debugging potential issues. - Collaborate closely with SoC architects, microarchitects, RTL developers, postsilicon, and physical design teams to ensure the functionality and performance of complex architectural features. - Perform root cause analysis and debug issues in the presilicon environment, implementing corrective actions to resolve failing tests. - Incorporate security measures into verification test plans, including regression and debug testing to ensure comprehensive coverage. - Maintain and continuously improve existing functional verification infrastructure and methodologies. - Absorb learning from postsilicon validation and update verification test plans to address missing coverage areas for future products.

Qualifications:

Minimum Qualifications - Bachelor's or BS degree in Electronics, Electrical Engineering, Computer Engineering, Computer Science, or a related field. - 3+ years of hands-on experience in digital design verification with a Bachelor's degree, 2+ years of experience with a Master's degree, or 0 years of experience with a PhD. - Proficiency in programming languages and scripting such as Python, Perl, C++, and UNIX environments. - Knowledge of Industry Architecture (IA) and Register Transfer Level (RTL) design concepts. Preferred Qualifications - Demonstrated ability to work collaboratively with design teams and architects to ensure chip functionality. - Experience developing innovative validation strategies incorporating machine learning (ML) and artificial intelligence (AI) techniques to improve efficiency and quality. - Strong problem-solving skills, with a track record of debugging complex issues at both the block and system levels. - Familiarity with emulation models, system simulation, and automated testing methodologies. If you are ready to work on cutting-edge technology in a collaborative and innovative environment, we encourage you to join us in shaping the next generation of computing solutions.

Job Type:

Experienced Hire

Shift:

Shift 1 (Malaysia)

Primary Location:

Malaysia, Penang

Additional Locations:

Malaysia, Kulim

Posting Statement:

Position of Trust

N/A

Work Model for this Role

Job Details:

Job Description:

The Role and Impact As a SoC Design Verification Engineer, you will play a pivotal role in ensuring Intel's next-generation Client CPU System-on-Chip (SoC) designs meet functional specifications and deliver top-tier quality. You will execute verification plans, develop reusable test environments, and identify and resolve bugs in pre-silicon designs to validate functionality and performance. Your contributions will directly support the successful delivery of cutting-edge products built for the era of hyper-scale computing. Business group Intel Corporation is at the forefront of innovation, advancing technology to empower global progress. The team is part of Intel's design and development group, focused on delivering high-quality, high-performance SoC solutions for next-generation products. Through collaboration across architecture, design, and post-silicon teams, the group ensures optimized functionality and reliability for Intel's cutting-edge chips. Key Responsibilities - Develop scalable and reusable verification plans, test benches, and environments to validate functional logic for integrated SoC designs. - Execute simulations and emulation models to verify design accuracy, analyze power and performance, and uncover potential issues. - Debug failing tests, root cause issues, and implement corrective measures within pre-silicon environments. - Collaborate closely with architects, microarchitects, RTL developers, and other design teams to improve verification coverage and methodologies. - Incorporate security activities and regression tests into validation plans to ensure comprehensive protection of SoC designs. - Document test plans and drive technical reviews with cross-functional teams to optimize design verification strategies. - Absorb post-silicon feedback to enhance validation methodologies for future products.

Qualifications:

Minimum Qualifications - Bachelor's degree in Electronics, Electrical, Computer Engineering, or Computer Science with 4+ years of hands-on experience in SoC design verification OR Master's degree in Electronics, Electrical, Computer Engineering, or Computer Science with 3+ years of experience. - Proficiency in developing test plans, simulation models, and debug procedures for complex SoC designs. - Experience with verification tools such as UVM, SystemVerilog, and emulation platforms. - Strong technical expertise in RTL design and verification methodologies. - Familiarity with scripting languages (e.g., Python, Perl) for process automation. Preferred Qualifications - Ability to work collaboratively with cross-functional teams to address architectural and microarchitectural challenges. - Experience in leveraging learning from post-silicon validation to enhance pre-silicon processes. - Excellent problem-solving skills and attention to detail in identifying and resolving design issues. - Passion for innovation and continuous improvement in SoC design verification strategies. Be part of shaping cutting-edge technology and collaborate with industry leaders to deliver world-class solutions. Join us in driving the future of computing.

Job Type:

Experienced Hire

Shift:

Shift 1 (Malaysia)

Primary Location:

Malaysia, Penang

Additional Locations:

Malaysia, Kulim

Posting Statement:

Position of Trust

N/A

Work Model for this Role

Job Details:

Job Description:

The Role and Impact As a Sales Account Manager, you will be at the forefront of driving Intel's business growth by managing strategic customer relationships and uncovering emerging revenue opportunities. You will collaborate with ecosystem partners and internal teams to deliver impactful account strategies that align with customer needs and Intel's product roadmaps. Your work will directly contribute to expanding Intel's global footprint and maximizing value for assigned accounts. Business group You will be part of Intel's Sales and Marketing Group (SMG), a dynamic organization focused on driving revenue growth and customer satisfaction across Intel's portfolio. This team plays a key role in enabling Intel's technology leadership and market expansion through collaboration with customers, distributors, and ecosystem partners. SMG works at the intersection of cutting-edge technology and global business, supporting Intel's mission to deliver world-changing innovations. Key Responsibilities - Partner with sales applications engineers to align Intel technologies and product roadmaps with customer strategies. - Identify and nurture emerging revenue opportunities, including software, services, and foundry solutions. - Secure new design win opportunities that lead to billed revenue and global product availability for regional markets. - Manage and sell Intel's diverse product portfolio, including CCG, DCAI, NEX, while fostering growth in emerging areas such as IFS and SaaS. - Collaborate with ecosystem partners (distributors, OEMs, ISVs) to support customer accounts and drive revenue growth. - Drive account planning and execution to identify and capitalize on growth opportunities. - Monitor customer feedback to address satisfaction gaps, resolve issues, and improve overall customer experience.

Qualifications:

Minimum Qualifications - Bachelor's degree in Business, Engineering, or a related field. - 8+ years of experience in senior sales, account management, or business development within the semiconductor, PC, or broader technology industries. - Proven experience managing high-value global accounts at technical and executive levels within a matrix organization. - Strong expertise in product portfolio management, pricing strategy, and revenue ownership. - Experience converting design wins into commercial outcomes, ideally with global PC OEM/ODM customers. - Proficiency in using market data, competitive intelligence, and customer insights to shape strategy. - Fluent in English and skilled in negotiation, communication, and stakeholder management across diverse teams. Preferred Qualifications - Ability to leverage strong interpersonal and leadership skills to build meaningful relationships with customers and partners. - Demonstrated aptitude for navigating complex sales processes and delivering measurable results. - Willingness to travel as required to support customer engagements and account execution. Join us to take on a high-impact role where your contributions will shape Intel's success and drive innovation in the global technology landscape.

Job Type:

Experienced Hire

Shift:

Shift 1 (China)

Primary Location:

PRC, Beijing

Additional Locations:

Posting Statement:

Position of Trust

N/A

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

Job Details:

Job Description:

As a Packaging Module Development Engineer, you will play a vital role in advancing Intel's semiconductor manufacturing capabilities by developing innovative packaging processes and equipment. Your day-to-day responsibilities will focus on optimizing assembly methods to achieve quality, reliability, and efficiency goals in high-volume manufacturing environments. By collaborating with cross-functional teams, you will help shape Intel's next-generation packaging technologies, directly contributing to the company's success in the semiconductor industry.

Business group

This position is part of Intel Corporation's Substrate Packaging Technology Development (SPTD) organization, which drives advancements in substrate packaging to support Intel's global technology leadership. The group focuses on delivering next-generation solutions for high-performance and mobile computing applications, enabling heterogeneous integration and die disaggregation across Intel's product portfolio.

Key Responsibilities

Develop and optimize advanced packaging processes, materials, and equipment to meet reliability, quality, and cost targets.
Design and implement process specifications, workflows, and equipment configurations for new technologies.
Conduct design of experiments (DOE) to characterize process windows and interactions between equipment, materials, and chemistry.
Drive continuous improvement efforts to enhance process capability, stability, and productivity.
Collaborate with cross-functional teams to resolve technical challenges and deliver impactful solutions.
Establish material specifications and partner with suppliers to ensure adherence to performance and quality standards.
Document advancements and process innovations through technical reports and white papers.
Provide sustaining support for equipment performance and process health in high-volume manufacturing environments.

Behavioral traits:

Team Collaboration: Works effectively across cross-functional teams and builds strong partnerships.
Comfort with Ambiguity: Thrives in undefined or evolving projects and takes initiative to create direction.
Performs Under Pressure: Manages multiple priorities, tight deadlines, and technical challenges while remaining focused on results.
Conflict Resolution: Handles disagreements professionally, using data and communication to align stakeholders and reach solutions.
Ownership & Problem Solving: Takes accountability, proactively addresses issues, and drives innovative solutions to completion.

Qualifications:

Minimum Qualifications

PhD degree in Materials Science, Mechanical Engineering, Electrical Engineering, Chemical Engineering, Organic Chemistry, Polymer Engineering, or other similar engineering degree and 1+years of related experience.
1+year of experience in:
- Combining engineering judgement and data analysis skills to draw conclusions, build models and design experiments.
- Materials science and engineering, and in material characterization techniques.
- Knowledge and experience in design of experiments (DOE), statistical data analysis and statistical process control (SPC).

Preferred Qualifications

Working knowledge and/or prior experience in optics and lasers, laser micro-machining and micro-fabrication.

Become part of Intel's cutting-edge technology development team, where your expertise and creativity will drive innovation and shape the future of semiconductor manufacturing. Apply today and join us in advancing the boundaries of what's possible.

Job Type:

Experienced Hire

Shift:

Shift 1 (United States of America)

Primary Location:

US, Arizona, Phoenix

Additional Locations:

Posting Statement:

Position of Trust

N/A

Benefits

Annual Salary Range for jobs which could be performed in the US: $133,800.00-188,890.00 USD

Work Model for this Role

Job Details:

Job Description:

The Role and Impact

As a PCB Layout Engineer, you'll deliver high-quality printed circuit board (PCB) designs for electrical boards, including flexible and rigid boards. You'll be responsible for creating layouts, detailed schematics, and designs using computer-assisted engineering software and ECAD tools. Your work will directly contribute to ensuring efficient, reliable, and cost-effective PCB designs that support Intel's cutting-edge technologies.

Business Group

This role is part of Intel's Data Center Group (DCG), which drives innovation and leadership in the data center industry. The group focuses on developing technologies and solutions that enable seamless connectivity, efficient processing, and scalability for data-intensive workloads. Join a team dedicated to advancing Intel's mission of transforming how the world accesses, manages, and processes data.

Key Responsibilities:

Create and deliver PCB layouts for various types of electrical boards, including high-speed, high-density, mixed-signal, analog, digital, and RF designs.
Prepare detailed schematics, drawings, and documentation for PCB fabrication, including fabrication assembly drawings.
Define component placement and trace routing rules to optimize board designs for performance, reliability, and manufacturability.
Conduct feasibility studies and manage board layout processes from concept to final tapeout.
Collaborate with cross-disciplinary teams, including electrical design, packaging, manufacturing, thermal, mechanical, and signal/power integrity teams to ensure high-quality designs.
Provide guidance on design specifications, fabrication capabilities, and cost-effective production solutions.
Continuously refine PCB design processes, proposing and implementing best practices to enhance quality and efficiency.

The ideal candidate should show the following behavioral traits:

Strong analytical and problem-solving skills with demonstrated skills to address design complexities and optimize results.
Advanced and effective communication and collaboration skills for working with multidisciplinary teams.
Passion for continuous learning and staying up to date with advancements in PCB design technologies and methodologies.

Qualifications:

Minimum qualifications, you must possess the below minimum qualifications to be initially considered for this position.

Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field

3+ years of hands-on experience in:

- PCB layout design
- Proficiency in ECAD tools – (ideally, Allegro Cadence Suite) and computer-assisted engineering design software.
- PCB design flow, including high-speed, high-density, mixed-signal, analog, digital, and RF designs.
- PCB fabrication documentation and assembly drawings.

Advanced English level.

Must have unrestricted, permanent right to work in Mexico (this role is not eligible for visa or immigration sponsorship).

Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Master's degree in Electrical Engineering, Computer Engineering, or a related field and 2+ years of hands-on experience with PCB layout design. OR PhD in a relevant field with no prior experience required.
Familiarity with signal integrity, power integrity, and thermal analysis principles.

Your contributions will play a key role in shaping innovative solutions that power Intel's industry-leading technologies. We invite you to bring your expertise and creativity to a role where you can grow, make an impact, and help drive the future of PCB design.

Job Type:

Experienced Hire

Shift:

Shift 1 (Mexico)

Primary Location:

Mexico, Guadalajara

Additional Locations:

Posting Statement:

Position of Trust

N/A

Work Model for this Role

Job Details:

Job Description:

As an AI Architecture Performance Analysis Graduate Intern, you will join Intel's GPU Compute Architecture team and contribute to core GPU kernel perf analysis using real AI workloads. Your work will directly support hardware/software co design and help analyze and shape the performance of next generation Intel GPU and AI accelerator platforms, while giving you hands on exposure to GPU architecture and low level performance engineering. Key Responsibilities • Analyze and optimize core GPU compute kernels for AI and numerical workloads (e.g., GEMM, Attention, operator fusion). • Reproduce representative AI inference and training workloads for GPU IP validation. • Perform GPU performance profiling and analysis to identify compute, memory, and pipeline bottlenecks. • Build performance profiles and models to understand architecture level performance behavior. • Provide workload and kernel level insights to support GPU architecture design and HW/SW co design efforts.

Qualifications:

Minimum Qualifications • Currently pursuing a Bachelor's, Master's, or PhD degree in Computer Science, Computer Engineering, Electrical Engineering, or a related technical field. • Proficiency in Python for analysis, experimentation, or tooling. • Solid understanding of AI fundamentals, including common models and algorithms. • Strong interest in GPU architecture, GPU programming, parallel computing, and performance optimization. • Basic knowledge of computer systems, such as CPU/GPU architecture, memory systems, and performance analysis. Preferred Qualifications • Experience with GPU kernels or programming models (e.g., CUDA, OpenCL, SYCL, Triton). • Exposure to performance optimization, compiler, or parallel computing coursework, research, or internships. • Strong analytical and problem solving skills, with the ability to reason from profiling data. • Interest in AI systems and infrastructure, beyond model level development. • Ability to work effectively in a collaborative, cross functional engineering environment.

Job Type:

Student / Intern

Shift:

Shift 1 (China)

Primary Location:

PRC, Beijing

Additional Locations:

Posting Statement:

Position of Trust

N/A

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

Job Details:

Job Description:

Who We Are

At Intel, we are shaping the future of computing. Our engineering teams develop the technologies that power billions of devices worldwide, from personal computers and cloud infrastructure to edge computing and artificial intelligence applications.

Join Intel's CPU Design team and become part of a world-class engineering organization responsible for designing and verifying next-generation processor technologies. As a Junior CPU Verification Engineer, you will work alongside experienced architects, designers, and verification engineers to ensure the quality, functionality, and performance of Intel's future CPU products.

The Role

As a CPU Verification Engineer, you will be responsible for verifying complex processor designs before they reach silicon. You will develop verification environments, create test plans, debug failures, and collaborate with cross-functional teams to ensure Intel CPUs meet functional, performance, power, and quality objectives.

What You’ll Do

Responsibilities may include but are not limited to:

Performs functional verification of CPU logic to ensure design will meet specification requirements.
Develops IP verification plans, test benches, and the verification environment to ensure coverage to confirm to CPU microarchitecture specifications.
Executes verification plans and defines and runs system simulation models to verify the design, analyze power and timing, and uncover bugs.
Replicates, root causes, and debugs issues in the presilicon environment.
Finds and implements corrective measures to resolve failing tests.
Collaborates with CPU architects, RTL developers, and physical design teams to improve verification of complex architectural and microarchitectural features and to meet functional, performance, and power goals.
Documents test plans and drive technical reviews of plans and proofs with design and architecture teams.
Maintains and improves existing functional verification infrastructure and methodology.
Participates in the definition of architecture and microarchitecture features of the CPU being designed actively.

Behavioral traits that we are looking for:

Strong analytical thinking and a passion for solving complex technical challenges.
Curiosity and eagerness to continuously learn new technologies, tools, and methodologies.
Strong written and verbal communication skills.
Effective collaboration and teamwork across multidisciplinary engineering organizations.
Ability to balance attention to detail while understanding broader system impacts.
Adaptability and resilience in a fast-paced technical environment.
Strong organizational and time-management skills.
A growth mindset and openness to feedback and continuous improvement.

Why Intel

At Intel, your work will have real-world impact from day one. You'll collaborate with industry-leading engineers, gain mentorship from technical experts, and contribute to cutting-edge processor technologies that enable the next generation of computing.

Whether you're passionate about computer architecture, hardware design, verification methodologies, or emerging AI technologies, Intel provides an environment where you can grow your career while solving some of the industry's most challenging engineering problems.

If you're excited by complex technical challenges and eager to help shape the future of computing, we encourage you to apply.

Intel invests in our people and offers a complete and competitive package of benefits employees and their families through every stage of life.

See Intel Benefits for more details.

Qualifications:

Note:

For information on Intel’s immigration sponsorship guidelines, please see

Intel U.S. Immigration Sponsorship Information

Minimum Qualifications and Experience:

Bachelor's degree Electrical/Computer Engineering or any related field completed or expected by June of 2027 with 3+ months of educational or work experience in the following:

Experience in digital logic design, including instruction set execution, ALUs, control units, registers, memory, and system buses.
Experience in at least one scripting language (e.g., Python, Perl, or Tcl), C++, and System Verilog.

Preferred Qualifications and Experience:

Use of AI agents in your projects, college classes, or software development.

Experience with RTL development.
Proficiency with C/C++, System Verilog coding and debug.
Knowledge and experience with x86 or any other computer architectures.
ASM skills.
Familiarity with version control software (GIT).
Experience with Synopsys simulators.

Job Type:

College Grad

Shift:

Shift 1 (United States of America)

Primary Location:

US, Texas, Austin

Additional Locations:

US, Oregon, Hillsboro

Posting Statement:

Position of Trust

N/A

Benefits

Annual Salary Range for jobs which could be performed in the US: $91,150.00-128,690.00 USD

Work Model for this Role

Job Details:

Job Description:

The Role and Impact As a Software Research Engineer/Scientist, you will leverage your software expertise, domain knowledge, and research methodologies to solve critical engineering challenges that drive technology and product innovation. On a daily basis, you will develop strategic software applications, algorithms, and AI solutions, conduct cutting-edge research to address industry and customer needs, and prototype new ideas to advance Intel's technological capabilities. Your work will directly contribute to shaping the future of Intel's midterm and long-term objectives. Business group As part of Intel's Foundry Automation, you will join a team focused on advancing software solutions that empower innovation and maintain Intel's position at the forefront of the industry. The group collaborates with factory partners, and technical teams to address key technology challenges, explore new possibilities, and deliver impactful solutions that support Intel's broader mission of enabling breakthroughs that drive progress and performance. Key Responsibilities - Develop and optimize software applications and algorithms to address strategic technology challenges. - Prototype and design proof-of-concept solutions to validate new ideas and methodologies. - Formulate Linear and Integer Optimization models using algebraic modeling languages such as CPLEX/OPL, AMPL, or GUROBI. - Explore the scalability and decomposition of large-scale Mixed Integer Programming (MIP) and Constraint Programming (CP) models. - Perform code reviews and ensure high standards of code quality and functionality. - Utilize data analysis and visualization skills to derive insights and effectively communicate results. - Collaborate with cross-functional teams, academic partners, and industry-standardization groups to drive impactful research and development initiatives.

Qualifications:

Minimum Qualifications
- Master's degree in relevant field such as Operations Research, Computer Science, or a related discipline with 2+ years of hands-on experience.

Experience to be considered:
- Proficiency in programming languages and software modeling techniques.
- Expertise in Linear and Integer Optimization, including experience with algebraic modeling languages like CPLEX/OPL, AMPL, or GUROBI.
- Strong skills in code review processes and optimization techniques.

Preferred Qualifications
- Experience with large-scale MIP/CP models, decomposition methods, and scalability challenges.
- Advanced data analysis and visualization capabilities.
- Demonstrated problem-solving skills and ability to perform in fast-paced, collaborative environments.
- Passion for innovation, curiosity to explore new technologies, and commitment to Intel's values of integrity, inclusiveness, and excellence.

We are excited about the unique perspectives and expertise you bring to the table. Join us in shaping the future of technology and making an impact that matters

Job Type:

Experienced Hire

Shift:

Shift 1 (United States of America)

Primary Location:

US, Arizona, Phoenix

Additional Locations:

Posting Statement:

Position of Trust

N/A

Benefits

Annual Salary Range for jobs which could be performed in the US: $149,600.00-245,160.00 USD

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

Job Details:

Job Description:

The Role and Impact

As a Module Engineering PhD Intern, you will contribute to the development, optimization, and implementation of advanced manufacturing processes within semiconductor production. In this role, you will work closely with experienced engineers to troubleshoot, sustain, and qualify manufacturing equipment while supporting process improvements that enhance operational performance, yield, and reliability. This internship offers a unique opportunity to apply cutting-edge research and technical expertise in a high-volume manufacturing environment, gain hands-on industry experience, and make meaningful contributions to technology that powers the world.

Business Group

Intel Foundry is at the forefront of semiconductor manufacturing innovation, delivering world-class process technologies and manufacturing solutions. The organization is focused on driving operational excellence, advancing manufacturing capabilities, and enabling the production of industry-leading semiconductor products. As part of Intel Foundry, you will collaborate with talented engineers and researchers who are shaping the future of technology through innovation, continuous improvement, and engineering excellence.

Key Responsibilities

Support the development, optimization, and implementation of manufacturing processes for semiconductor production modules.

Troubleshoot, sustain, and qualify manufacturing equipment to improve performance, reliability, and operational efficiency.

Partner with cross-functional engineering teams to develop and enhance process control methodologies.

Analyze process and equipment data to identify improvement opportunities and drive manufacturing excellence.

Execute technical projects focused on equipment performance, process optimization, and yield enhancement.

Apply engineering principles and research methodologies to solve complex manufacturing challenges and develop innovative solutions.

Contribute to initiatives that improve safety, quality, productivity, and operational effectiveness.

Qualifications:

Minimum Qualifications

Currently pursuing a PhD degree in Engineering, Materials Science, Physics, Chemistry, Electrical Engineering, Mechanical Engineering, Chemical Engineering, or a related STEM discipline.

3+ months of hands-on experience through research, laboratory work, internships, academic projects, or industry experience.

Fundamental understanding of semiconductor manufacturing processes, process engineering, or advanced manufacturing methodologies.

Strong analytical, problem-solving, and technical communication skills.

Preferred Qualifications

Research experience in semiconductor device fabrication, process development, materials engineering, or manufacturing technologies.

Experience working with process characterization, statistical analysis, data analytics, or experimental design methodologies.

Hands-on experience operating, troubleshooting, and maintaining complex equipment and hardware systems

Strong academic performance with a cumulative GPA of 3.0 or higher preferred.

Knowledge of semiconductor manufacturing equipment, process control systems, and equipment qualification techniques.

Demonstrated ability to work effectively in cross-functional and collaborative engineering environments.

Proven ability to take initiative, solve complex technical problems, and deliver results in a fast-paced setting.

Bring your passion for innovation and research to Intel Foundry, where you will work alongside industry-leading engineers and technical experts to solve complex manufacturing challenges. This internship provides an opportunity to develop advanced technical skills, contribute to breakthrough technologies, and help shape the future of semiconductor manufacturing while building a strong foundation for your career.

Job Type:

Student / Intern

Shift:

Shift 1 (United States of America)

Primary Location:

US, Oregon, Hillsboro

Additional Locations:

Posting Statement:

Position of Trust

N/A

Benefits

Annual Salary Range for jobs which could be performed in the US: $120,898.00-120,902.00 USD

The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Our standard internship rates are based on your degree, location, and the job role. Your recruiter can share more about the specific compensation range for your preferred location and job role during the hiring process.

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

Job Details:

Job Description:

The Role and Impact

As a Module Engineer, you will play a pivotal role in the high-volume manufacturing of cutting-edge integrated circuits. You will own critical equipment and processes, conducting tests and optimizations to ensure precision, safety, and production efficiency. Your day-to-day responsibilities will directly contribute to delivering high-quality products that drive Intel's leadership in semiconductor innovation.

Business Group

You will be part of Intel Corporation's Wafer Packaging Manufacturing (WPM) C4 OR group, which focuses on advancing manufacturing technologies to enable rapid device miniaturization and mass production of integrated circuits. The team collaborates globally to optimize processes, enhance equipment performance, and support Intel's broader vision of delivering world-class silicon solutions.

Key Responsibilities

- Own and maintain high-volume manufacturing equipment and processes to ensure optimal performance, precision, and safety.
- Conduct tests, measurements, and analyses to monitor critical dimensions and defectivity within the production line.
- Recommend and implement modifications to improve manufacturing techniques, production efficiencies, and overall output.
- Lead efforts to enhance safety, quality, cost indicators, and productivity across equipment and processes.
- Drive continuous improvement initiatives for equipment and process key performance indicators, collaborating with suppliers as needed.
- Manage the installation, conversion, and qualification of manufacturing tools during factory ramps, ensuring safe and timely execution.
- Develop and optimize excursion prevention systems to safeguard equipment and processes.
- Detect and address discrepant material or activities to maintain process integrity and reliability.
- Participate in technology transfer activities, including training and auditing installations at other sites to ensure consistent manufacturing processes globally.

The ideal candidate should exhibit the following behavioral traits:

-Strong problem-solving and analytical skills with the ability to handle complex technical challenges.
-Effective communication and collaboration skills to work across teams and with global counterparts.

Qualifications:

Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Relevant experience can be obtained through schoolwork, classes, project work, internships, and/or military experience. Additional preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications

- Bachelor's degree in Engineering STEM related field (e.g., Electrical Engineering, Chemistry, Chemical Engineering, Mechanical Engineering, Material Science, Physics, Robotics, Molecular and Nanomaterials, Nanoengineering)

with 6+ months of experience in equipment maintenance and/or repair processes within a manufacturing environment.

This position is not eligible for Intel immigration sponsorship

Preferred Qualifications

-Master’s degree in engineering STEM related field (e.g., Electrical Engineering, Chemistry, Chemical Engineering, Mechanical Engineering, Material Science, Physics, Robotics, Molecular and Nanomaterials, Nanoengineering)
-Demonstrated commitment to safety and quality in manufacturing operations.
-Understanding of process control techniques, defect analysis, and manufacturing efficiency optimization.

Join us in shaping the future of technology by applying your skills to innovative manufacturing processes that drive world-class products

Job Type:

Shift:

Shift 1 (United States of America)

Primary Location:

US, Oregon, Hillsboro

Additional Locations:

Posting Statement:

Position of Trust

N/A

Benefits

Annual Salary Range for jobs which could be performed in the US: $76,390.00-146,440.00 USD

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

Job Details:

Job Description:

About the Role

As an IP Design Verification Engineer, you will play a critical role in shaping Intel's innovations by ensuring the functionality and reliability of our intellectual property (IP) designs. You will join a dynamic team that collaborates across architecture, design, and verification groups to ensure our solutions meet and exceed industry standards.

Your work will directly impact the development of groundbreaking technologies, driving Intel's success in delivering world-class products to the market. This is an exciting opportunity to contribute to cutting-edge projects while advancing your career in a forward-thinking and collaborative environment.

Key Responsibilities

Develop and execute comprehensive verification plans to ensure IP logic meets microarchitecture specifications
Create and maintain test benches and verification environments to achieve high coverage and reliability
Perform system simulations to verify designs, analyze power and timing, and identify bugs in the presilicon environment
Debug verification issues by replicating, root-causing, and implementing corrective measures for failing tests
Collaborate with architects, RTL developers, and physical design teams to enhance verification methodologies for complex features
Document verification plans and drive technical reviews with architecture and design teams
Maintain and improve existing verification infrastructure, tools, and methodologies
Participate in defining verification infrastructure and contribute to the development of technical flow methodologies (TFMs)

You Should Demonstrate the Following to Be Successful

Strong collaboration and communication skills to effectively work across architecture, design, and physical teams
Demonstrated ability to lead technical reviews and drive alignment on verification strategies
Passion for continuous learning, innovation, and contributing to a culture of technical excellence
Proven ability to analyze and resolve complex design issues in a presilicon environment

Qualifications:

Minimum Qualifications

Bachelor's or BS degree in Electrical Engineering, Computer Engineering, or a related field
9+ years of experience in IP functional verification with a Bachelor's degree, 6 years with a Master's degree, or 4 years with a PhD

The above experience must include:

Hands-on experience in building verification environments using SystemVerilog and UVM
Expertise in RTL design and debugging using industry-standard tools and methodologies
Hands-on experience verifying networking IPs/SoCs implementing RDMA (RoCEv2, iWARP, InfiniBand) or comparable reliable transport protocols (e.g., Ultra Ethernet Transport, TCP offload), including features such as QP/connection state, retransmission, packet ordering, and congestion control

Preferred Qualifications

Familiarity with scripting languages, such as Python or Perl, to automate verification tasks

We invite you to bring your expertise, creativity, and enthusiasm to Intel. Take the next step in your career by applying today and be part of a team that is shaping the future of technology.

Job Type:

Experienced Hire

Shift:

Shift 1 (United States of America)

Primary Location:

US, Texas, Austin

Additional Locations:

US, Arizona, Phoenix, US, California, Santa Clara

Posting Statement:

Position of Trust

N/A

Benefits

Annual Salary Range for jobs which could be performed in the US: $190,610.00-269,100.00 USD

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

Job Details:

Job Description:

The world is transforming - and so is Intel. Intel is a company of bold and curious inventors and problem solvers who create some of the most astounding technology advancements and experiences in the world. With a legacy of relentless innovation and a commitment to bring smart, connected devices to every person on Earth, our diverse and brilliant teams are continually searching for tomorrow's technology and revel in the challenge that changing the world for the better brings. We work every single day to design and manufacture silicon products that empower people's digital lives. Come join us and do something wonderful.

We are seeking a Senior DevSecOps Engineer to design, implement, and maintain secure, scalable infrastructure and deployment pipelines that underpin our suite of data science and decision support applications. This role sits at the intersection of software development, security, and cloud operations - owning the reliability, security posture, and delivery velocity of our platform.

A strong security mindset is essential, as the team is actively preparing to handle data of increasing sensitivity, making the establishment and enforcement of secure infrastructure practices a foundational expectation of this role. Cross-functional communication is equally critical: this person must be able to translate infrastructure and security concepts clearly to both technical and non-technical stakeholders across development, data science, and security disciplines.

About the Team
We're a team of data scientists and application developers who work in tandem to develop self-service decision support tools. We support applications essential to the strategic design and tactical execution of semiconductor manufacturing. We are a vibrant and innovative team with a strong customer focus and proven value which drives significant impact to Intel. We also maintain a strong technical presence in prestigious internal platforms and publications, as well as external publications.

As we grow, we are investing in the infrastructure and security foundations that will allow our applications and data capabilities to scale responsibly - and this role is central to that investment.

Qualifications:

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your degree, research and or relevant previous job and or internship experiences.

Minimum Qualifications:
•Bachelor's degree with 5+ years of industry/post-university experience in Computer Science, Computer Engineering, Information Technology, Information Security, or a related STEM field.
•6+ years of experience using Python and/or Bash for automation, API integrations, and application troubleshooting.
•4+ years of experience administering Linux systems and managing DNS, firewalls, and core network protocols.
•2+ years of experience with at least one major cloud provider (AWS, Azure, or GCP).
•2+ years of experience with Kubernetes.
•2+ years of experience with CI/CD pipelines and tools such as GitHub Actions, GitLab CI, or Jenkins.
•3+ years of experience using Git for source control and collaborative development workflows.
•2+ years of experience with Infrastructure as Code (IaC) tools such as Terraform, OpenTofu, Pulumi, or Ansible for provisioning and configuration management.

Preferred Qualifications:
•Master's with 3+ years of relevant industry/post-university experience.
•Experience with Kubernetes-native workflow orchestration (Argo Workflows, Airflow, or Prefect) for large-scale batch and job-based compute.
•Familiarity with Prometheus/Mimir or equivalent metrics pipelines and Grafana and Loki for observability.
•Experience with container and IaC security scanning in CI/CD (Trivy, Wiz, or equivalent), image signing, and vulnerability remediation workflows.
•Experience with configuring workload identity and access control - preferably using EntraID
•Demonstrated experience with advanced secrets management patterns and tooling (e.g., HashiCorp Vault, SOPS, or equivalent).
•Experience with FastAPI or Flask for backend web API development.
•MongoDB, MariaDB, MySQL or NoSQL database experience.
•Experience with Azure Blob/Files storage and Kubernetes persistent storage patterns.
•Experience authoring runbooks and design documentation that reduce single-person dependency on platform knowledge.
•Ability to work independently in an environment with limited centralized platform support.
•Advanced English level with strong cross-functional communication skills.

Job Type:

Experienced Hire

Shift:

Shift 1 (United States of America)

Primary Location:

US, Arizona, Phoenix

Additional Locations:

Posting Statement:

Position of Trust

N/A

Benefits

Annual Salary Range for jobs which could be performed in the US: $137,610.00-265,870.00 USD

Work Model for this Role

Job Details:

Job Description:

At Intel, we create world-changing technology that improves the life of every person on the planet. By joining the Substrate Packaging Technology Development (SPTD) organization within our Advanced Packaging Team, you will support our mission to be the supplier of choice for leading-edge, affordable advanced substrate packaging solutions. This is your opportunity to lead a high-performing team that values technical excellence, continuous learning, and a collaborative, supportive work environment.

We are seeking an SPTD Manufacturing Operations Manager to join our advanced packaging operations in Chandler, Arizona. In this role, you will lead and develop a team of highly skilled technicians responsible for equipment maintenance, troubleshooting, tool recovery, and daily factory execution on several shifts. Working hands-on in our dynamic manufacturing facility, you will maintain a visible shift presence to strengthen team performance, optimize equipment stability, and directly support the strategic goals that enable Intel's continued packaging leadership.

Candidate must maintain a strong, visible presence on the manufacturing floor and work compressed work-week schedules as needed.

One opening per-shift. Shift information below:

Shift 4: (nights frontend) 6PM-6AM Sun-Tues and alternating Saturday nights
Shift 5: (days frontend) 6AM-6PM Sun-Tues and alternating Wednesday days
Shift 6: (nights backend) 6PM-6AM Wed-Sat and alternating Saturday night
Shift 7: (days backend) 6AM-6PM Thurs-Sat and alternating Wednesday days

Key Responsibilities:

Shift Team Leadership: Lead, schedule, and develop a team of technical equipment technicians, managing daily workstation assignments, rotations, and performance standards.
Maintenance & Resource Planning: Build and execute detailed resource plans for corrective and preventive maintenance activities to maximize equipment uptime and stability.
Continuous Improvement Leadership: Own shift performance metrics (safety, quality, cost, and output) by driving continuous improvement initiatives using structured Lean, Six Sigma, or Model-Based Problem Solving (MBPS) methodologies.
Training Program Execution: Establish, evaluate, and execute technical training plans to systematically upgrade technician skills aligned with manufacturing roadmap requirements.
Cross-Functional Engineering Collaboration: Partner directly with Module Engineering groups to resolve systemic hardware faults, execute tooling improvements, and stabilize manufacturing processes.
Operational Policy & Safety Enforcement: Enforce strict compliance with Intel safety guidelines, factory protocols, and operational policies on-shift.

As a Successful Candidate, You Will Bring:

Dynamic Leadership & People Development: Natural talent for building, coaching, and motivating high-performing technical teams in a fast-paced environment.
Structured Problem Solving: Passion for utilizing logical, data-driven methodologies to dissect complex manufacturing bottlenecks and equipment failures.
Exceptional Communication: Clear, direct, and diplomatic verbal and written communication style to align priorities across shift handoffs and engineering teams.
Strategic Executive Presence: Comfort managing critical, high-urgency factory excursions while maintaining structural standards and promoting corporate values.

Apply today to join Intel Arizona's Substrate Packaging Technology Development team. Take command of critical shift operations, develop the next generation of technical talent, and build a rewarding leadership career.

Qualifications:

Minimum Qualifications:

- Bachelor's degree in a STEM field (Engineering preferred) and 3+ years of experience in a manufacturing or related, OR Master's degree in a STEM field and 2+ years of experience.
- Relevant experience in any of the following:

Technical aptitude to understand and troubleshoot complex manufacturing equipment.
Experience developing, managing, and executing training plans for technical teams.
Proficiency in structured problem-solving methodologies such as Lean Manufacturing, MBPS, or Six Sigma.

Preferred Qualifications

3+ years of experience in:
- Substrate, assembly, packaging, or silicon process development or manufacturing.
- Equipment qualification and maintenance processes.
- Factory operation systems, factory physics.
- Leading continuous improvement projects with measurable results.
- Managing teams in a manufacturing or technical environment.

Job Type:

Experienced Hire

Shift:

Shift 6 (United States of America)

Primary Location:

US, Arizona, Phoenix

Additional Locations:

Posting Statement:

Position of Trust

N/A

Benefits

Annual Salary Range for jobs which could be performed in the US: $89,010.00-170,630.00 USD

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

Job Details:

Job Description:

As a Module Development Engineer, you will drive technology development and process enablement for both high-volume manufacturing and next-generation semiconductor technologies. You will be responsible for developing, integrating, optimizing, and sustaining advanced manufacturing processes that enable innovative device architectures while meeting performance, quality, and cost targets. This role requires strong technical expertise, cross-functional collaboration, and a continuous improvement mindset to solve complex engineering challenges and accelerate technology readiness.

This role requires regular onsite presence to fulfill essential job responsibilities.

Key Responsibilities

Lead the development and optimization of advanced semiconductor manufacturing processes, including material selection, process parameter optimization, metrology strategies, equipment qualification, and system integration.
Design and conduct experiments, feasibility studies, simulations, and characterization activities to evaluate process technologies, equipment capabilities, and material interactions.
Drive technology development and process integration solutions that support both current high-volume manufacturing and future technology roadmap requirements.
Define, develop, and validate integrated Module Target Specifications (MTS) to meet product performance, manufacturability, and reliability requirements.
Develop and maintain integrated Failure Mode and Effects Analyses (FMEAs), Control Plans, and change management processes to ensure manufacturing stability and quality excellence.
Perform pathfinding activities for new process technologies, equipment, and hardware solutions that enable innovative device architectures and future product generations.
Investigate manufacturing excursions, yield detractors, and process quality issues using data-driven and model-based problem-solving methodologies.
Lead cross-functional teams in identifying root causes, implementing corrective actions, and driving sustainable process improvements that enhance line yield, electrical yield, and overall product performance.
Champion the use of defect metrology, process control systems, and statistical analysis tools to continuously improve process capability and manufacturing output.
Recommend, develop, and implement modifications to manufacturing equipment and operating procedures to improve efficiency, throughput, cost, and process performance.
Support new product introductions by coordinating process readiness, documentation, tooling, equipment qualification, and manufacturing execution requirements.
Serve as the primary interface between fabrication operations and internal or external stakeholders, ensuring effective communication and execution across multiple organizations and geographic locations.
Track product progress through technology development, process setup, engineering builds, qualification, and production ramp to ensure milestone achievement and schedule adherence.
Coordinate closely with process modules, materials development teams, silicon integration organizations, fabrication facilities, package assembly teams, suppliers, and external partners to address technical challenges, logistics, and supply chain requirements.
Manage ATV build planning, forecasting, and execution to support development and manufacturing objectives.
Partner with equipment and materials suppliers to develop, qualify, and implement enabling technologies that support current and future process requirements.
Stay current with industry trends, emerging process technologies, advanced materials, and manufacturing innovations, while helping shape Intel's future technology roadmap through collaboration with the broader supplier and technology ecosystem.
Drive the implementation of new manufacturing systems, methodologies, and best practices that support scalable, cost-effective, and high-volume production.

Behavioral Traits

Strong problem-solving skills, adaptability, and ability to manage multiple tasks simultaneously.
Passionate about advancing Intel's strategic goals and driving meaningful industry advancements.

Qualifications:

Minimum Qualifications

Bachelor's degree in Mechanical Engineering, Materials Science, Chemical Engineering, Electrical Engineering, Physics, Chemistry, or a related STEM discipline with 3+ years of industry experience; OR Master's degree in a related STEM discipline with 2+ years of industry experience; OR PhD in a related STEM discipline.
Experience mentioned above should be a combination of the following:
- Technical expertise in semiconductor processing, system controls, opto-mechanics, or mechanical systems.
- Proficiency in Statistical Process Control (SPC) and Design of Experiments (DOE) principles.
- Programming experience in Python or MATLAB.
- Hands-on experience with robotics, automation systems, vision systems, and image processing.

Preferred Qualifications

Troubleshoot manufacturing processes and equipment.
Experience with packaging processes, equipment automation development, and project management in technology development.

We are looking for individuals who are passionate about innovation, eager to make an impact, and excited to join a company that values collaboration and technical excellence. Apply today and take the next step in your career journey with us.

Job Type:

Experienced Hire

Shift:

Shift 1 (United States of America)

Primary Location:

US, Oregon, Hillsboro

Additional Locations:

Posting Statement:

Position of Trust

N/A

Benefits

Annual Salary Range for jobs which could be performed in the US: $115,110.00-162,500.00 USD

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

Job Details:

Job Description:

Engineering Module Team Leader
As an Engineering Module Team Leader at Intel Ireland, you will lead a team of Module Engineers responsible for driving operational excellence in Intel's high-volume manufacturing environment. Your day-to-day focus will involve managing engineering activities to optimize processes, improve yield, and ensure equipment reliability. Strong alignment with factory operational goals and factory commits is critical in this role. This role is pivotal in achieving key safety, quality, and cost goals while fostering a highly productive and inclusive team environment. Your leadership will directly impact Intel's ability to deliver world-class manufacturing solutions.

Business group
This position is part of Intel Foundry, a global leader in semiconductor manufacturing. The group is dedicated to delivering industry-leading innovation, enabling cutting-edge technologies, and supporting Intel's strategic manufacturing goals. The team works collaboratively to ensure robust solutions are implemented across factory operations, helping Intel maintain its competitive edge in the semiconductor industry.

Key Responsibilities
Lead daily engineering operations, prioritizing safety, quality, yield improvement, and manufacturing efficiency.
- Oversee process engineering activities, including tool installation, qualification, and operational sustaining.
- Develop and implement strategies to optimize production output and reduce manufacturing costs.
- Mentor and develop the technical skills and leadership capabilities of module engineers.
- Drive continuous improvement initiatives in process stability, equipment reliability, and productivity.
- Facilitate technology transfer to other sites through training and audits to ensure matched processing across locations.
- Collaborate with cross-functional teams to manage complex project execution, resolve challenges, and support factory ramps.
- Cultivate an inclusive and positive team environment, reinforcing Intel's values and fostering organizational health.
- Provide clear communication to team members and stakeholders regarding priorities, progress, and critical path activities.

Qualifications:

Minimum Qualifications
- Bachelor's Degree in a technical engineering discipline (e.g., Mechanical, Electrical, Chemical) with 4+ years of engineering experience.
- Proven experience in Fab engineering activities, including operational sustaining, tool qualification, and ramp production.
- Demonstrated expertise in problem-solving using statistical methodologies and data-driven decision making.
- Proficiency in project management tools and methodologies.

Preferred Qualifications
- Experience in a high-volume manufacturing (HVM) start-up environment.
- CWW leadership experience supporting factory operations.
- Strong coaching and employee development skills to foster great talent and team growth.
- Proven ability to lead teams with a forward-thinking, motivated, and inclusive approach.
- Analytical skills and commitment to driving continuous improvement across all performance indicators.
- Excellent verbal and written communication skills, with the ability to influence decision-making across organizational boundaries.

Your leadership and technical expertise will be instrumental in advancing Intel's manufacturing capabilities. If you are passionate about driving innovation and empowering teams to achieve excellence, we encourage you to apply today.

Job Type:

Experienced Hire

Shift:

Shift 1 (Ireland)

Primary Location:

Ireland, Leixlip

Additional Locations:

Posting Statement:

Position of Trust

N/A

EU Salary

We offer a total compensation package that ranks among the best in the industry.

Annual Salary Range for this job which could be performed in Ireland is: €85,700.00 - €133,900.00

The compensation range displayed in this posting reflects the minimum and maximum target compensation for this position. Within this range, individual pay is determined by job related skills, experience, and relevant education, training. As part of our total compensation approach, the final offer may include additional pay components and benefits. Your recruiting team will share the confirmed base salary along with any applicable total compensation elements upon employment offer delivery.

Work Model for this Role

a8:T1583,

Job Details:

Job Description:

The Role and Impact

As a Module Engineer, you will play a key role in optimizing and maintaining critical high-volume manufacturing processes that are essential to Intel's production of cutting-edge semiconductor products. This hands-on role focuses on ensuring equipment reliability, process efficiency, and product quality, directly contributing to Intel's ability to deliver exceptional technology solutions to meet industry demands.

Business group

You will join Intel's Wafer Packaging Manufacturing organization, a team dedicated to delivering innovation and operational excellence in high-volume production environments. This group plays a central role in Intel's advanced packaging strategy, which is critical for fabricating high-performance chips like next-generation AI processors.

Key Responsibilities

- Develop, monitor, and optimize manufacturing processes to ensure operational reliability and product quality.
- Conduct tests and measurements to control critical dimensions and defectivity within production lines.
- Analyze and address process excursions to enhance efficiency and minimize production disruptions.
- Collaborate with cross-functional teams to drive manufacturability improvements and process enhancements.
- Apply Statistical Process Control and Design of Experiments (DOE) methodologies to refine processes and improve yield.
- Perform maintenance, repair, and optimization activities for manufacturing tools and components.
- Partner with equipment suppliers to resolve operational issues and implement technological advancements.
- Oversee equipment installation, conversion, and qualification during factory ramps, meeting safety and quality standards.

Qualifications:

Minimum Qualifications

Bachelor's degree in Materials Engineering, Mechanical Engineering, Chemical Engineering, Chemistry, Physics, or a related discipline with 2+ years of relevant experience in manufacturing process or equipment engineering.
OR Master's degree in Materials Engineering, Mechanical Engineering, Chemical Engineering, Chemistry, Physics, or a related discipline.

Preferred Qualifications

Experience in Semiconductor Manufacturing or Semiconductor Packaging Manufacturing
Experience with Statistical Process Control (SPC), Metrology tool recipe creation, and tool troubleshooting

Job Type:

College Grad

Shift:

Shift 1 (United States of America)

Primary Location:

US, New Mexico, Albuquerque

Additional Locations:

Posting Statement:

Position of Trust

N/A

Benefits

Annual Salary Range for jobs which could be performed in the US: $89,010.00-146,440.00 USD

Work Model for this Role

Job Details:

Job Description:

This is an exceptionally exciting moment to enter the semiconductor manufacturing industry. Global demand for advanced computing-driven by AI, automation, cloud infrastructure, and digital transformation-is fueling the largest period of growth and reinvestment the sector has seen in decades. Semiconductors are now recognized as critical to economic resilience, national security, and technological leadership leading to unprecedented expansion in manufacturing capacity and innovation. For professionals in the field, this translates to rare opportunities to shape breakthrough technologies, contribute to globally significant projects, and be part of arguably the most rapidly evolving and impactful industry ever.

Intel's Global Construction Engineering (GCE) organization is responsible for the design and engineering of Intel's major manufacturing and cleanroom facilities worldwide. Our organization consists of highly specialized, in house architects and engineers working in a deeply collaborative environment. Together with our factory, operations, and supply chain partners, we deliver some of the most technically complex construction programs in the industry-projects that demand precision, speed, and disciplined cost management.
Our vision is to be the world leader in semiconductor foundry construction engineering, and we are expanding our team to support the acceleration of Intel Foundry's manufacturing roadmap. We are seeking exceptional, technical talent to join our organization that thrive in a fast paced environment that enjoys working with leading edge technology and is motivated by opportunities to innovate and make meaningful business impact.

This is a hybrid position in Hillsboro, Oregon. Training assignments may be required at other domestic or international locations.

As an Electrical Project Engineer - Global Construction Engineering your responsibilities will include but are not limited to:

Consult for any major construction project related to facilities power systems.
Assess the feasibility of new projects.
Develop more detailed scope through field walks and collaboration with facilities operations partners and project engineers from other disciplines.
Serve as the Owner's representative to provide technical guidance and issue resolution during detailed design and construction.
Manage the performance of the Integrators Architectural and Engineering/Owners design.
Act as consultant vendor in their discipline.
Interface and coordinate with contract design, construction, scheduling, and estimating resources.
Interface with facilities staff and project managers to enable facility design efforts for their area of expertise.
Define design criteria, lead scope definition and justification, develop design concepts, and oversee completion of positioning, programming, and detailed design.
Work with estimators to ensure costs are captured and project budgets are met.
Improve standards and drive innovative solutions.
Collaborate and share learnings with their counterparts at other sites across the globe.
Build and drive safety culture of caring in every business environment, office to the construction sites, and from front-end planning to construction execution.

The successful candidate should exhibit the following behavioral traits:

Written, visual and verbal communication skills- especially in communicating technical issues.
Willingness to collaborate across engineering disciplines, organizations and geographic boundaries.
Team and quality-oriented skills.
Technical writing skills (e.g. specifications).
Technical skills in electrical engineering.
Skills to lead and provide direction to technical teams.
Champion and value the safety culture of caring throughout the project lifecycle.

Qualifications:

This position is not eligible for Intel immigration sponsorship.

Minimum Qualifications:

Bachelor's degree in Electrical Engineering or related field.
4+ years of experience on design and construction of electrical systems.

Preferred Qualifications:

Master's degree in Electrical Engineering or closely related field with 3+ years of experience on design and construction of electrical power systems.
Focus on industrial, semiconductor, and cleanroom projects.
Professional Engineer status.

Experience in the following:

Reading and interpreting construction contract documents.
1-line diagrams and BIM (3D modeling).
ATEX and EPD requirements.
Power modeling databases such as EasyPower or SLM is preferred.

3+ years of experience in:

Electrical systems such as medium voltage, low voltage, emergency power systems, critical (UPS) power systems, lighting systems, and heat trace systems.
Managing project change control.
Construction, start-up, and commissioning/turnover of electrical facilities systems.
Building and fire codes and hazardous occupancies is preferred.

Job Type:

Experienced Hire

Shift:

Shift 1 (United States of America)

Primary Location:

US, Oregon, Hillsboro

Additional Locations:

Posting Statement:

Position of Trust

N/A

Benefits

Annual Salary Range for jobs which could be performed in the US: $99,550.00-197,960.00 USD

Work Model for this Role

Job Details:

Job Description:

We are seeking an experienced Analog Design and Infrastructure DA Manager to lead the development, deployment, and governance of analog/mixed-signal design environments and CAD infrastructure. This role owns EDA tool ecosystems, PDK integration, compute infrastructure, design data governance, and tapeout manifest management to ensure high productivity, reproducibility, and audit readiness across silicon programs..The ideal candidate combines deep analog/mixed-signal design flow and e-test structure development expertise with strong infrastructure leadership and disciplined configuration/data management practices. Key Responsibilities-1. Analog Design Environment and Flow Management-Own and maintain analog and mixed-signal design flows using platforms such as Virtuoso ,Develop and maintain schematic, layout, verification, and extraction flows (LVS, DRC).Support simulation environments including HSPICE, Corner analysis.Drive automation and methodology improvements to reduce turnaround time and increase design robustness. 2. Infrastructure and Compute Management Oversee Linux-based DA infrastructure including compute farms, storage systems, and license servers (FlexLM). Manage LSF/grid environments and job scheduling systems. Ensure scalability, system monitoring, high availability, and performance optimization. Partner with IT on hardware lifecycle planning, cloud integration, and disaster recovery. Maintain secure, access-controlled design environments aligned with IP protection policies. 3. Design Data, Manifest and Configuration Management Design Data Governance Manage large-scale analog design libraries, hierarchical database structures, and technology libraries. Define backup, archival, and retention policies for tapeout-critical data. Implement data integrity validation and corruption prevention controls. Oversee distributed storage systems optimized for EDA workloads. Manifest and Tapeout Release Management Own creation and governance of tapeout manifests including: PDK Versions, Tool Versions, Extraction/Verification Decks, Simulation Models, Signoff Configurations Establish reproducible environment release frameworks for analog programs. Implement controlled qualification flows for tool/PDK upgrades prior to production rollout. Maintain environment snapshots to ensure reproducibility and post-silicon traceability. Support formal tapeout readiness and design signoff reviews. Version Control and Configuration Management Deploy and manage version control systems (Git, Cliosoft, SVN, Perforce,) for: CAD scripts and automation, Methodology flows, PDK overlays, Verification decks Define branching, tagging, and release strategies for multi-project and multi-node environments. Implement dependency tracking across tools, PDKs, IP, and infrastructure. Apply infrastructure-as-code principles where applicable. Automation and Traceability Develop automated environment capture tools to log tool versions, library states, and system configurations. Enable reproducible simulations and environment packaging. Create dashboards and reporting metrics for design data health and DA service KPIs. 4. Leadership and Cross-Functional Collaboration Lead and mentor DA and infrastructure engineers. Serve as the primary interface between analog design, digital CAD, IT, and EDA vendors. Drive tool evaluations, upgrades, and vendor negotiations. Develop internal documentation, training programs, and best practices. Establish measurable service-level KPIs and continuously improve DA operations.

Qualifications:

Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field. 10+ years of experience in analog/mixed-signal design or CAD support. 5+ years of leadership experience. Strong hands-on experience with analog design platforms such as Virtuoso and p-cell development. Custom Compiler. Deep understanding of analog layout, verification flows, PDK integration, and tapeout processes. Proven experience managing design data governance and tapeout manifest control. Strong Linux system administration and scripting skills (Python, Tcl, Shell, SKILL). Experience with compute grid management, storage architecture, and license management. Expertise in version control and configuration management systems Preferred Qualifications Experience with advanced nodes (FinFET, GAA). Knowledge of CI/CD practices applied to EDA environments. Experience supporting geographically distributed design teams

Job Type:

Experienced Hire

Shift:

Shift 1 (India)

Primary Location:

India, Bangalore

Additional Locations:

Posting Statement:

Position of Trust

N/A

Work Model for this Role

Job Details:

Job Description:

Join Intel Foundry Construction and Sourcing (FCS) in building the world's largest semiconductor manufacturing factories across the globe. The future is what we build. The scope of our work includes but is not limited to New Wafer Fabrication factories (Fabs), Fab Conversions, Process Tools Install, Infrastructure, and Progressive Build.

We are looking for world-class technical talent to join our team. If you enjoy working with the latest technology in a rewarding, fast-paced environment, this is the right place for you. Everywhere you go, you'll find an opportunity to make a difference. In any given workday, you will be given the responsibility to innovate and create an impact on our business. The FCS portfolio delivers billions of dollars in construction projects around the world, and the successful delivery of these contributes to Intel's success. This is an onsite position at the campus in Albuquerque, New Mexico reporting to the Director of Construction.

Responsibilities will include but are not limited to:

Plan and deliver construction projects using multiple project delivery and compensation strategies. From project initiation through closeout, including the development and management of project scope, schedules, budgets, contracting and compensation strategies, EHS, quality program, project controls and change management.
Ensure that the project is at all times in compliance with Construction Management Practices and to standard operating procedures. Projects include disciplines such as mechanical, process, bulk gas, electrical, architectural, water, process specific support systems (PSSS), IT and I/C.
Interact and partner with customer management; Resource plan the project; Provide direction to the construction project teams; Have a sound knowledge of the project and construction contracts; Partner with Tool Install, CS Operations and Factory to develop and manage an integrated plan that will achieve project objectives and commitments.
Build and drive safety Culture of Caring in every business environment, office to the construction sites, and from front-end planning to construction execution.
Strong communication and collaboration skills, with a proven ability to work with diverse teams across multiple disciplines.
Eagerness to grow within a global organization focused on innovation and excellence.

In addition to the qualifications a successful candidate will demonstrate:

Team player.
Leadership skills to manage a diverse team.
Expertise to identify, analyze, and solve problems.
Excellent communications skills.
Organized and detail-oriented.
Champion and value the safety culture of caring throughout the project lifecycle.

Qualifications:

This position is not eligible for Intel immigration sponsorship.

Minimum Qualifications

Bachelor's degree in a relevant field with 0-1 years of hands-on experience in construction project/program management, with demonstrated skills gained through internships, academic projects, coursework, or hands-on training OR a Master's degree in a relevant field.
Experience in project management software such as MS Project or other scheduling tools.
Expereince construction site documentation and quality assurance processes.

Preferred Qualifications

Experience or familiarity with safety protocols and compliance standards in construction projects.

Join us and become part of a team where your contributions are valued, your growth is nurtured, and your impact will drive Intel's success in shaping the future of technology.

Job Type:

College Grad

Shift:

Shift 1 (United States of America)

Primary Location:

US, New Mexico, Albuquerque

Additional Locations:

Posting Statement:

Position of Trust

N/A

Benefits

Annual Salary Range for jobs which could be performed in the US: $73,820.00-140,540.00 USD

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

Job Details:

Job Description:

In this position, you will be responsible to own equipment collaterals, improve process and performance of Test module in our organization. Your responsibilities will include but not be limited to:

- Continuous improvement to improve Test collaterals hardware and process performance to meet Safety, Quality, Productivity and Cost indicator goal to support Intel products ramp.

- Partner and collaborate with respective Technology Development site and other factories counterpart to develop, startup, improve and define the critical equipment collaterals performance and process parameters to enable a successful startup and ramp of the factory

- Attend to escalation from Equipment Supervisor / Shift and troubleshoot the hard down cells from the area where you are assigned to.

- Perform detail investigation and problem-solving data analysis to ensure equipment / tool is up and ready to support production

- Align to product roadmap and build plan requirement, proactively work on collaterals ordering and tool fungibility qualification across links to support capacity ramp.

- Able to lead and provide coaching and training to sustaining and manufacturing workforce to improve their technical competency

- Able to work independently with minimal supervision and lead a small team to support factory tool and equipment install to meet critical schedule.

- Develop Test collaterals monitoring and dashboard for early signal monitoring.

Qualifications:

- Bachelor or Master Degree in Electrical Electronics, Mechanical Engineering and other engineering field.
- Extensive knowledge on Test equipment installation and qualification, technical/statistical analysis and scripting/coding will be an added advantage.
- Proficiency in manufacturing process control and semiconductor equipment operations.
- Familiarity with equipment monitoring techniques and excursion management systems.
- Basic problem-solving and data analytics skills to identify and implement effective solutions.
- Ability to perform technical analysis and troubleshoot equipment issues in real-time.
- Proven ability to work collaboratively in cross-functional teams.
- Strong organizational, communication, and planning skills to manage tasks effectively.
- Positive attitude with adaptability to dynamic environments and evolving priorities.
- Eagerness to expand technical expertise and contribute to innovation.

If you're passionate about technology and ready to contribute your skills to redefine manufacturing standards, seize this opportunity to join our team.

Job Type:

College Grad

Shift:

Shift 1 (Malaysia)

Primary Location:

Malaysia, Penang

Additional Locations:

Posting Statement:

Position of Trust

N/A

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

Job Details:

Job Description:

The Role and Impact:

As a PCB Layout Engineer, you will play a critical role in designing and delivering printed circuit boards (PCBs) for a wide range of innovative electrical systems. You will be responsible for preparing layouts, detailed drawings, and schematics using advanced engineering design software and ECAD tools. Your contributions will directly impact the quality, reliability, and performance of Intel's products, ensuring they meet multidisciplinary requirements and industry standards.

Business Group:

Joining Intel's Silicon and Platform Engineering Group (SPE), you will be part of a team that drives innovation by enabling world-class silicon and platform solutions. This group is dedicated to advancing the design and development of cutting-edge technologies and systems for Intel's diverse product portfolio, supporting the company's broader mission of delivering high-performance computing solutions to customers worldwide.

Key Responsibilities:

- Design and deliver PCB layouts for rigid and flexible circuit boards, ensuring high-density, high-speed, mixed-signal, analog, digital, and RF designs meet platform-level requirements.
- Prepare detailed drawings, schematics, and final design packages for PCB fabrication, including assembly drawings and documentation.
- Define and implement design guidelines, specifications, and best-known methods to optimize manufacturing, reliability, and cost efficiency.
- Collaborate with electrical design, packaging, manufacturing, thermal, and mechanical teams to drive continuous improvements in PCB design processes.
- Interface with signal and power integrity teams to deliver high-quality PCB designs that meet stringent performance requirements.
- Conduct feasibility studies, component placement, and trace routing, ensuring compliance with fabrication and assembly specifications.
- Provide guidance on vendor fabrication capabilities and contribute to improving design methods for scalability and efficiency.

Qualifications:

Qualification:

Bachelor of Engineering
Experience in the Domain: 05-08 years
Hands on experience in Cadence Allegro Library and Layout Tool

Version 23.1 and 24.1]

Hands on experience in developing and validating Logical Symbol and Physical Footprint creation using Allegro
PCB Design Editor HDL/EDM/Librarian including Allegro Design Workbench and CES.
Added knowledge of mechanical tools like Creo /Solidworks /AutoCad is preferable
Knowledge of Parts and Components
Intense knowledge of CES, Stackup, board cross section, impedance details, Components and specifications
Capabilities of delivering PCB CAD Layout of High Density-High Speed, Mixed, Analog, Digital, RF Designs, Flex Designs etc.
Must have hands on experience in HDI micro via technology in Allegro
Basic knowledge of Signal integrity, Power Integrity, EMI/EMC,
Mechanical and Thermal analysis with respect to PCB board layout
DFA, DFM and DFT knowledge to adhere to Quality assurance
Valor experience along with other Gerber viewer tool knowledge
Automation and Skill scripting knowledge
Additional knowledge of IPC standards, guidelines, methodologies, Mechanical specifications and processes
We encourage talented individuals who are ready to embrace challenges and make a lasting impact to apply for this position. Join our team to shape the future of technology and drive meaningful advancements in PCB design.

Job Type:

Experienced Hire

Shift:

Shift 1 (India)

Primary Location:

India, Bangalore

Additional Locations:

Posting Statement:

Position of Trust

N/A

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

Job Details:

Job Description:

Intel Edge Computing Engineering Team is on a mission to enable successful ODMs and customers in India to develop differentiated Edge products based on Intel technologies.

The team is looking for an experienced Digital Design Engineer with strong board-level hardware design, design-review, hardware-enabling and debug expertise to support customers developing platforms based on Intel Core and Atom processors.

The engineer will work closely with customer hardware teams through the complete board design and enabling lifecycle, including schematic design and review, high-speed interface implementation, PCB layout review, prototype board bring-up, hardware debug, root-cause analysis and resolution of design issues.

The role requires strong hands-on knowledge of processor-based digital hardware design and the ability to independently review and debug complex customer boards.

The engineer will also provide periodic technical training to customers and proactively support customer design-review, board-debug and technical-support requests to help accelerate successful product development.

Key Responsibilities:

1. Board-Level Digital Design and Review: Support board-level digital hardware design and conduct detailed design reviews for customer products based on Intel Core and Atom processors.

2. Schematic Review: Review customer schematics against Intel Platform Design Guides, reference schematics, datasheets, design checklists and other technical collateral, and identify potential design issues before PCB fabrication.

3. Digital Interface Design: Review processor interfaces and associated circuitry, including DDR4/DDR5/LPDDR4/LPDDR5 memory; PCIe; USB; SATA; DisplayPort/eDP/HDMI and other display interfaces; Ethernet and connectivity interfaces; I2C/SMBus, SPI, UART and GPIO; and clock, reset, boot/configuration straps and other platform control signals.

4. PCB Layout Review: Review multilayer PCB stack-up and board layout implementation for processor-based platforms, including controlled impedance, high-speed routing, length matching, differential-pair routing, reference planes, via structures and signal-return paths for compliance with Intel layout guidelines and industry best practices.

5. High-Speed Digital Design: Perform detailed schematic and layout reviews of high-speed digital interfaces, particularly DDR, PCIe and USB, and recommend corrective actions based on Intel design guidelines and sound high-speed digital design practices.

6. Component Selection and Implementation: Support selection and design implementation of board-level digital components including memory devices, clock devices, level translators, buffers, multiplexers, switches, retimers, interface controllers and supporting logic.

7. Board Bring-Up and Debug: Drive and support customer board bring-up, including initial power-on, processor initialization, boot failures, memory initialization issues, high-speed interface failures and other board-level hardware issues.

8. Hands-On Lab Debug: Use lab debug equipment such as oscilloscopes, digital multimeters, logic analyzers, protocol analyzers, I2C/SMBus tools and programmers to isolate and resolve hardware issues.

9. Root-Cause Analysis: Analyze hardware debug data to identify root causes, differentiate between schematic, PCB-layout, component, assembly, manufacturing and configuration-related issues, and recommend corrective actions.

10. Customer Issue Resolution: Actively support and drive resolution of customer technical issues, design-review requests and board-debug requests on an ongoing and periodic basis, working with customers from problem definition through root-cause identification and closure.

11. Customer Technical Training: Develop and deliver periodic technical training sessions and workshops for customer engineering teams covering Intel processor-based board design, hardware design guidelines, high-speed interfaces, schematic/layout best practices, board bring-up and debug methodologies.

12. Customer Hardware Enabling: Provide hands-on technical guidance to customer hardware engineers during schematic design, PCB development, prototype bring-up, EVT/DVT and initial product-enabling phases.

13. Cross-Functional Issue Resolution: Collaborate with Intel silicon, platform, validation, BIOS/Firmware and other engineering teams when customer hardware issues require cross-functional investigation and resolution.

14. Technical Communication: Effectively communicate design-review findings, technical risks, debug results and recommended corrective actions to customer and internal engineering teams.

15. Design Best Practices: Develop and maintain hardware design-review checklists, debug procedures, technical training materials, design best practices and lessons learned for reuse across customer programs.

16. Customer Engagement: Periodically engage with customer engineering teams to review active designs, understand technical issues and provide timely engineering support throughout their product-development lifecycle.

Qualifications:

Required Qualifications:

Bachelor's or Master's degree in Electronics/Electrical Engineering or a related discipline, with 8 to 12 years of relevant industry experience, preferably including substantial hands-on experience in processor-based board design and debug.

Strong hands-on experience designing and debugging complex multilayer digital boards, preferably using Intel Core/Atom or similar high-performance processor/SoC platforms.

Experience in schematic capture and review using industry-standard EDA tools such as Cadence OrCAD/Allegro, Siemens/Mentor Graphics Xpedition or equivalent.

Strong experience in processor-based schematic design/review, including CPU/SoC interfaces, DDR memory, PCIe, USB, SATA, display interfaces, Ethernet/connectivity, clock/reset, SPI/I2C/SMBus/UART/GPIO, and boot and configuration circuitry.

Strong understanding of high-speed digital board design principles, including controlled impedance, differential signaling, termination, propagation delay, length/skew matching, crosstalk, return-path discontinuities and via effects.

Experience with 8 to 16+ layer PCB designs, PCB stack-ups and placement/routing reviews for complex processor platforms.

Ability to interpret and apply processor datasheets, platform design guides, reference schematics, layout guidelines and hardware design checklists to customer hardware designs.

Strong hands-on experience with board bring-up and hardware failure analysis, particularly processor boot, memory initialization and high-speed interface issues.

Experience using lab equipment such as oscilloscopes, digital multimeters, logic analyzers, protocol analyzers and other board-level debug tools.

Good understanding of PCB fabrication, assembly processes, DFM/DFT considerations and hardware failure mechanisms.

Ability to independently analyze complex board-level problems, perform root-cause analysis and drive technical issues toward corrective action and closure.

Ability to work directly with customers, manage multiple concurrent design-review and debug requests, and provide timely technical support.

Strong technical presentation and communication skills with the ability to conduct technical training and workshops for customer engineering teams.

Preferred Qualifications

Experience designing, reviewing or supporting boards based on Intel Core or Atom processors.

Experience with embedded and Edge compute designs such as COM Express, COM-HPC, 3.5-inch SBC, Mini-ITX, embedded compute modules and custom industrial platforms.

Hands-on experience with DDR4/DDR5/LPDDR memory design, layout review and debug.

Experience reviewing high-speed interfaces such as PCIe Gen4/Gen5, USB 3.x/USB4, DisplayPort and high-speed Ethernet.

Familiarity with industry-standard Signal Integrity analysis/simulation tools from Cadence, Siemens EDA or equivalent, with the ability to understand and interpret simulation results.

Experience working directly with ODM/OEM/customer engineering teams during schematic review, PCB review, prototype board bring-up and technical issue resolution.

Experience developing and delivering technical training, workshops or design-guideline sessions for hardware engineering teams.

Strong customer-facing communication, problem-solving and technical presentation skills.

Willingness to travel to customer locations across India on a need basis for design reviews, technical training, board bring-up and hardware debug support.

Primary Location: Bangalore, India

Travel to customer locations across India on a need basis to support hardware design reviews, customer technical training, board bring-up and debug activities.

Job Type:

Experienced Hire

Shift:

Shift 1 (India)

Primary Location:

India, Bangalore

Additional Locations:

Posting Statement:

Position of Trust

N/A

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

Job Details:

Job Description:

Intel Ireland is a leading centre for semiconductor manufacturing and technology development, producing advanced process technologies that enable Intel products used around the world. Our teams work in a highly automated, high-volume manufacturing environment, focused on safety, innovation, operational excellence, and continuous improvement.

Responsibilities / What you'll do:

As a Module Process / Equipment Engineer at Intel Ireland, you will support the development and high-volume manufacturing of advanced semiconductor technologies. Working in a fast-paced fab environment, you will collaborate with cross-functional teams to deliver safe, stable, and efficient manufacturing processes.

In this role, you will:

Support the transfer of new process/automation technologies from Technology Development into High Volume Manufacturing.
Take ownership of module and/or equipment performance, including qualification, monitoring, and continuous improvement.
Help maintain high levels of equipment availability and process performance to meet safety, quality, output, and cost targets.
Support preventative maintenance strategies, troubleshooting activities, and implementation of equipment or process upgrades.
Use data analysis and structured problem-solving methods to identify issues, improve process capability, and reduce variation.
Partner with engineers across process, equipment, manufacturing, quality, and module teams to solve technical challenges and improve operational performance.
Contribute to defect reduction, yield improvement, and manufacturability enhancements.
Assist in driving improvements in safety, productivity, quality, and cost within your assigned area.
Learn, apply, and help sustain best practices across site technologies while developing technical expertise in semiconductor manufacturing.

Qualifications:

To be initially considered for this position, you should have:

A relevant Bachelor's, Master's, or equivalent qualification in Engineering or Science discipline, such as Chemical Engineering, Mechanical Engineering, Electrical Engineering, Electronic engineering, Materials Science, Physics, Chemistry or a similar technical field.
0-4 years of relevant work experience.
A strong interest in semiconductor manufacturing, process engineering, or equipment engineering.
Analytical and problem-solving skills, with the ability to use data to identify trends and support decision-making.
Good communication and teamwork skills, with the ability to work effectively across multiple disciplines.
A proactive approach to learning and continuous improvement in a technical manufacturing environment.

Preferred qualifications:
The following would be an advantage:

Knowledge of semiconductor manufacturing processes or high-volume manufacturing environments.
Experience through internships, university projects, research, or placements in process engineering, equipment engineering, manufacturing, or related technical areas.
Familiarity with statistical analysis, experimental design, or structured problem-solving methodologies.
Experience working with data analysis tools, technical reporting, or process/equipment performance monitoring.
Familiarity with data automation tools or custom scripts used to extract, clean, and analyze manufacturing data (Python, SQL, MATLAB, R, VBA, Shell scripting, BASH)
Awareness of safety, quality, and operational excellence principles in an industrial environment.

Job Type:

College Grad

Shift:

Shift 1 (Ireland)

Primary Location:

Ireland, Leixlip

Additional Locations:

Posting Statement:

Position of Trust

N/A

EU Salary

We offer a total compensation package that ranks among the best in the industry.

Annual Salary Range for this job which could be performed in Ireland is: €41,000.00 - €77,000.00

The compensation range displayed in this posting reflects the minimum and maximum target compensation for this position. Within this range, individual pay is determined by job related skills, experience, and relevant education, training. As part of our total compensation approach, the final offer may include additional pay components and benefits. Your recruiting team will share the confirmed base salary along with any applicable total compensation elements upon employment offer delivery.

Work Model for this Role

b0:T1282,

Job Details:

Job Description:

Responsibilities
In this dynamic role, you will lead the management and continuous improvement of Intel's Warranty Credit returns supply chain solution to meet key business objectives, in close collaboration with third-party suppliers across the globe to enable efficient and scalable reverse logistics operations. You will ensure data accuracy, enhance operational efficiency, and deliver strategic insights through analytics and strong business acumen. As the primary point of contact for Warranty Credit programs, projects, and issue resolution, you will drive the design, development, and deployment of solutions that support global business and organizational goals.

Your responsibilities will include, but not be limited to:

Representing the organization as the primary point of contact for cross-functional programs and projects, building strong collaborative relationships with internal stakeholders, external partners, and third-party suppliers across global regions, including but not limited to GLO, Commercial, Global Trade, and local Custom Authorities to ensure alignment, seamless execution, and compliance with customs and regulatory requirements
Managing and overseeing ICS suppliers across regions, including third-party warehouses, ensuring operational excellence (OPEX), contract compliance, quality control, and strong governance standards
Providing consistent leadership and program management in managing the operation OPEX performance indicators, global projects and activities while maintaining clear communication on scope, timelines, risk and cost management and recalibrating priorities and effective resource planning
Managing complex, multi-functional supply chain activities across supplier management, transportation, and customs compliance with deep supply chain expertise
Driving Return on Investment (ROI) analysis and leveraging insights from complex data sets to optimize supply chain performance and identify margin growth opportunities

Qualifications:

Minimum Qualifications

Minimum 3 years of relevant experience in Reverse Logistics/Returns Management or Supply Chain Management.
Strong communication skills, with the ability to tailor messages to different audiences and deliver clear, concise presentations and verbal updates.
Proven ability to conduct in depth analysis, exercise sound judgment, and proactively evaluate existing programs. Able to develop solutions for a broad range of complex challenges.
Strong interpersonal and stakeholder management skills. Able to work effectively in a diverse, dynamic, and cross functional environment, collaborating to identify optimal solutions and influence positive outcomes.
Comfortable working in ambiguous situations, able to operate independently, and highly self motivated.
Project management experience, along with experience in customs compliance or working with local customs authorities, is an added advantage.
Hands-on experience with enterprise ERP systems, specifically SAP (R/3 or S/4HANA).

Job Type:

Experienced Hire

Shift:

Shift 1 (Malaysia)

Primary Location:

Malaysia, Penang

Additional Locations:

Posting Statement:

Position of Trust

N/A

Work Model for this Role

Job Details:

Job Description:

About the Organization
Intel's Foundry Standard Cell team is seeking a talented and motivated Senior Design Engineer to join our growing team. In this role, you will design leading edge experiments to develop, characterize, and test standard cells. You will play a critical role in enabling customers by listening to their needs and building the solutions.

Key Responsibilities

Defines, implements, characterizes, and validates design solutions to meet design requirements for power, performance, area (PPA), manufacturability, and cost.
Capable of implementing all aspects of the physical design flow, including standard cell circuit, layout, extraction, characterization, and optimization of timing, congestion, power, signal integrity, and reliability to achieve goals.
Collaborates closely with all standard cell collateral to understand design requirements and develop robust implementation and validation strategies.
Reviews and validates work to ensure compliance with design, manufacturing, and quality requirements.
Fast turn-around experiments - devising experiments, running them end to end, and guiding data driven decisions across multiple audiences (peer working groups, management, and technical leaders).
Run end-to-end flows to generate, validate, and release custom standard cell collateral per on demand requests.

Core Competencies

Strong written and verbal communication skills are required with the ability to tailor the communication based on the audience.

Qualifications:

The Minimum qualifications listed below are required to be initially considered for this position. Minimum qualifications listed below would be obtained through a combination of industry relevant job experience, internship experience and / or schoolwork/classes/research. The preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications:

Bachelor's degree in: Electrical Engineering, Electronics Engineering, Nanoscience, Microelectronics, Computer Engineering, or a STEM related field.
2+ years' experience in one or more of the following:
- Standard cell layout
- Standard cell abstract modeling
- Standard cell characterization
- ASIC design and verification
Experience using one or more of the following tools: Cadence Virtuoso, Synopsys Custom Compiler, Cadence Abstract Generator, Synopsys PrimeLib, Cadence Liberate, Synopsys Fusion Compiler, Cadence Innovus, Cadence Tempus, Synopsys PrimeTime, Synopsys HSpice, Synopsys StarRC, Synopsys ICV, Cadence Pegasus, Siemens Calibre.

Preferred Qualifications:

Post Graduate Degree in: Electrical Engineering, Electronics Engineering, Nanoscience, Microelectronics, Computer Engineering, or a STEM related field.
Unix proficiency and basic software skills using command line languages (csh, bash, perl, python) are highly valued.

We are looking for innovative thinkers ready to make an impact in the evolving semiconductor landscape. Apply today and be part of Intel's mission to create technologies that connect and enrich lives globally.

Job Type:

Experienced Hire

Shift:

Shift 1 (United States of America)

Primary Location:

US, California, Santa Clara

Additional Locations:

US, California, Folsom

Posting Statement:

Position of Trust

N/A

Benefits

Annual Salary Range for jobs which could be performed in the US: $122,440.00-232,190.00 USD

Work Model for this Role

Job Details:

Job Description:

The Role and Impact accuracy and functionality of Intel's next-generation Xeon server SoCs. Your day-to-day responsibilities will focus on performing functional logic verification, developing scalable verification plans, and executing emulation models to uncover and address design challenges. Your contributions will directly enhance the quality, reliability, and performance of Intel's flagship server products, making this position integral to delivering cutting-edge technology to global markets.

You will be joining Intel's Data Center Group (DCG), a dynamic organization dedicated to advancing the capabilities of the world's data centers. DCG focuses on developing innovative server technologies that drive business transformation, cloud computing, and AI workloads. As part of this team, you will help propel Intel's vision of creating world-changing technology that enriches the lives of every person on earth.

The primary responsibilities for this role will include, but are not limited to:

Perform functional logic verification of integrated SoC designs to ensure adherence to specifications.
Define and develop scalable and reusable block, subsystem, and SoC verification plans, test benches, and environments.
Execute verification plans utilizing emulation and system simulation models to evaluate design power, performance, and functionality.
Debug and analyze issues in the pre-silicon environment and implement corrective measures for resolution.
Collaborate with architects, RTL developers, and post-silicon teams to improve verification processes for complex architectural features.
Document technical test plans and participate in reviews with design and architecture teams.
Incorporate security test coverage within the verification environment to ensure compliance with security requirements.
Maintain and optimize existing functional verification methodologies for continuous improvement.
Absorb post-silicon learnings to refine pre-silicon validation strategies for future projects.

Qualifications:

Minimum Qualifications:

Minimum qualifications are required to be initially considered for this position.

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field with 0-1 years of hands-on experience in silicon design and/or validation gained through internships, academic projects, coursework, or hands-on training OR Master's degree in the same fields with no prior professional experience required.
Demonstrated coursework or technical experience in silicon design and/or validation/verification.

Preferred Qualifications:

Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Experience with developing and verifying complex IPs and/or SoCs using UVM/SystemVerilog.
Knowledge of OVM/UVM, constrained random verification methodologies, and the complete verification lifecycle, including test plan development, execution, debug, and coverage closure.
Proficiency in scripting languages for automation and process improvement.
Familiarity with cache coherency principles and layered protocols in multi-processor SoCs.
Experience with Xeon CPU pre-silicon, emulation validation, or post-silicon validation.
Strong analytical, debugging, and problem-solving skills with a proactive mindset for task ownership and collaboration.

We invite you to bring your skills and passion to Intel, where you'll have the opportunity to grow your expertise, innovate on impactful projects, and contribute to building a brighter future in technology.

Job Type:

College Grad

Shift:

Shift 1 (United States of America)

Primary Location:

US, California, Santa Clara

Additional Locations:

Posting Statement:

Position of Trust

N/A

Benefits

Annual Salary Range for jobs which could be performed in the US: $105,650.00-149,150.00 USD

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

Job Details:

Job Description:

The Role and Impact We are seeking a skilled RF Design Engineer to join our team and contribute to the design and optimization of RF hardware for wireless communication products, including WiFi and Bluetooth applications. In this role, you will take ownership of PCB layouts and collaborate on Si-Package-Board co-design activities, ensuring the highest performance, cost efficiency, and quality of our products. Your work will play a crucial role in advancing RF technology for next-generation wireless solutions. Business group The Silicon and Platform Engineering Group (SPE) drives innovation by developing cutting-edge hardware and platform solutions that power Intel's advanced technologies. This team focuses on delivering high-quality designs and optimizations for wireless communication systems, supporting Intel's broader mission to lead technological progress across industries. Key Responsibilities - Design, develop, and optimize RF hardware, including PCB and package layouts, for wireless applications such as WiFi and Bluetooth. - Define floorplans, layouts, and physical designs for RF circuit architecture while adhering to design rules and manufacturing constraints. - Collaborate with cross-disciplinary teams to integrate silicon, package, and board-level designs as part of a co-design optimization process. - Take ownership of PCB layout from component placement to final output, supporting manufacturing and assembly processes. - Implement design rules specific to substrate/PCB technologies and ensure compliance with DRC and DFM requirements.

Qualifications:

Job Qualifications Minimum Qualifications - Bachelor's or BS degree in Electrical Engineering, Mechanical Engineering, or a related field, or equivalent experience per business needs. - 6+ years of experience in RF hardware development, including PCB and package layout. - Proficiency in Cadence Allegro with expertise in board layout, package layout, and package technology. - Solid understanding of RF fundamentals, including electromagnetic theory, communication theory, and RF system analysis. - Experience with circuit simulation tools and debugging techniques. - Familiarity with physical design for debugging and signal/power integrity analysis. - Knowledge of design rules, design for manufacturability (DFM), and design rule checks (DRC). Preferred Qualifications - Experience with RF physical design for wireless products, including Si-Package-Board co-design optimization. - Knowledge of mentor CAD tools, AutoCAD, and/or SolidWorks. - Proven ability to solve complex problems and work collaboratively within cross-functional teams. - Strong communication skills to effectively engage with multiple stakeholders and project teams. - Experience designing and optimizing circuits for wireless communication products to achieve maximum performance, quality, and cost efficiency. Join us to shape the future of wireless technology and make a meaningful impact in RF design innovation.

Job Type:

Experienced Hire

Shift:

Shift 1 (Taiwan)

Primary Location:

Taiwan, Taipei

Additional Locations:

Posting Statement:

Position of Trust

N/A

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

Job Details:

Job Description:

As an Information Technology Undergraduate Intern, you will play a vital role in supporting Intel's IT operations and solutions. You will be actively involved in hands-on projects, collaborating with cross-functional teams to solve real-world challenges and improve processes. Your contributions will help enhance technological efficiencies and support the development of innovative solutions that drive business performance.

Global IT is dedicated to delivering impactful technology solutions that support Intel's business operations worldwide. The group focuses on advancing enterprise systems, optimizing IT workflows, and ensuring seamless integration of technologies to enable Intel's continued success and innovation in the marketplace.

The primary responsibilities for this role will include, but are not limited to:

Designs, builds, and integrates applications and platforms to support Intel's business needs and application packaging deployment that meets IT standards.
Collaborate with IT teams to analyze, design, and implement solutions to improve enterprise systems and processes.
Assist in troubleshooting and resolving technical issues to ensure operational efficiency.
Participate in testing and validating IT systems, applications, and processes to support performance reliability.
Contribute to the documentation of system processes and procedures for knowledge sharing and future reference.
Work on assigned projects and tasks, ensuring timely delivery and quality outcomes.

A successful candidate will have proven experience demonstrating the following skills and behavioral traits:

Strong analytical and problem-solving skills with attention to detail.
Strong communication and collaboration skills to work effectively in a team environment.
Enthusiasm for learning and adapting to new technologies and methodologies.
Ability to manage time effectively and balance multiple tasks or projects in a dynamic environment.

Qualifications:

Minimum Qualifications:

Minimum qualifications are required to be initially considered for this position.

Pursuing a Bachelor's or licenciatura in System Engineering or related fields.
Experience in one or more programming languages such as .NET, MS-SQL, Postgres, Node JS or React, Python, Java, or C++.
Experience in using common software tools or programming languages relevant to IT environments.
Knowledge of the Software Development Lifecycle and/or Test Methodologies.
Knowledge of the Agile Software Development Methodology.
Advanced English level.
Must have unrestricted - permanent right to work in Costa Rica.

Take the next step in your professional journey by applying for this exciting internship opportunity. Join Intel's Global IT team to gain valuable experience, refine your skills, and make an impact in a global organization that thrives on innovation.

Job Type:

Student / Intern

Shift:

Shift 1 (Costa Rica)

Primary Location:

Costa Rica, San Jose

Additional Locations:

Posting Statement:

Position of Trust

N/A

Work Model for this Role

Job Details:

Job Description:

The Role and Impact As the APJ Edge Revenue Analyst, you will play a pivotal role in supporting the revenue forecasting process including POR, RevOpt for edge related business. You will be responsible for analyzing sales data, forecasting revenue, and partnering with relevant stakeholders to optimize supply and demand planning while ensuring data accuracy and governance. Your contributions will directly impact sales strategies and customer satisfaction, enabling the team to achieve business objectives effectively. Business group The Sales and Management (SMG) team is the engine behind Intel's customer connections, delivering innovative solutions and driving market growth. SMG supports Intel's broader goals by developing and executing strategies that optimize product supply and revenue while fostering strong relationships with customers and partners. Joining this dynamic group means becoming part of a team that values collaboration, data-driven insights, and operational excellence. Key Responsibilities - Own the APJ Edge Revenue planning process including POR, RevOpt and Close - Partner with BU Ops, GTM, Country/Account teams to support the edge business in the region - Build APJ edge business insights by leverage demand signals, end customers consumptions that translates into customer segment insights and future growth opportunities - Analyze and interpret sales data to provide actionable insights that inform forecasting, supply chain planning, and revenue optimization. - Collaborate with sales teams, Intel business units, and factories to align supply and demand planning with mutual business objectives. - Build and maintain foundational data sets, reports, and dashboards to track key performance indicators and enhance business intelligence capabilities. - Partner cross-functionally to ensure data quality, governance, and availability across systems and platforms. - Design and deliver training on sales processes and procedures to team members, ensuring efficient execution of strategies. - Support the rollout of sales strategies by delivering strategic insights and reporting for planning and performance tracking. - Work closely with sales teams to gather business requirements and coordinate with technology solutions teams to develop CRM and sales enablement systems.

Qualifications:

Minimum Qualifications - Bachelor's degree in a relevant field with 10+ years of hands-on experience in sales operations, data analytics, or related areas, OR a Master's degree in a relevant field with 6+ years of experience - Proven ability to design and implement data visualization tools and performance tracking dashboards using business intelligence platforms. - Proficiency in analytical tools and software such as Excel, SQL, and data visualization platforms (e.g., Tableau, Power BI). - Demonstrated experience in supply chain planning, revenue forecasting, or sales data operations. Preferred Qualifications - Strong communication and presentation skills to effectively convey strategic insights across diverse audiences. - Experience working cross-functionally in a collaborative team environment. - Ability to adapt to a fast-paced, dynamic work environment and manage multiple priorities effectively. Explore the opportunity to contribute your expertise and help shape Intel's sales operations. Join us in delivering innovative solutions that drive success and make a lasting impact.

Job Type:

Experienced Hire

Shift:

Shift 1 (China)

Primary Location:

PRC, Shenzhen

Additional Locations:

Malaysia, Penang, Taiwan, Taipei

Posting Statement:

Position of Trust

N/A

Work Model for this Role

Job Details:

Job Description:

The Role and Impact As a Regional Edge Supply Analyst, you will play a critical role in supporting the APJ Edge business through robust demand and supply management processes. You will leverage data-driven decision-making and deliver actionable insights that optimize sales operations and performance. In this role, you will design and execute analytics that support forecasting, budgeting, and planning activities while partnering across teams to ensure data quality, governance, and availability. Your contributions will help align supply and demand, enhance customer satisfaction, and support Intel's revenue growth. Business Group The Sales and Management Group (SMG) at Intel is dedicated to driving global growth by delivering innovative solutions that meet customer needs and support business objectives. SMG focuses on building strong partnerships, optimizing customer engagement, and enabling seamless operations to ensure Intel's technology reaches markets effectively. Key Responsibilities - Partner with the BU Sales Demand team and planners on Edge-related demand and supply management. - Manage weekly supply prioritization across APJ markets. - Lead the monthly demand collection (MRD) process and synthesize data into actionable insights. - Own the regional allocation process to ensure critical demand requirements are met. - Manage customer and field-team escalations related to supply. - Partner with the Edge GTM team on demand- and supply-related initiatives as needed. - Execute sales analytics to support forecasting, planning, and budgeting activities. - Collaborate with cross-functional teams to ensure data quality, governance, and availability. - Develop, implement, and improve sales operations processes, including customer supply chain and compliance measurements. - Design, build, and maintain reports for forecasting, planning, and performance tracking. - Build foundational datasets and deliver strategic insights to support sales decision-making. - Review and analyze sales data to monitor performance and identify root causes of issues. - Enhance internal business intelligence, data visualization, and reporting capabilities.

Qualifications:

Minimum Qualifications - Bachelor's degree in a relevant field and 7+ years of hands-on experience in sales operations, analytics, or a related domain OR a Master's degree in a relevant field and 4+ years of experience. - Proficiency in analytical tools and techniques, such as Excel, Power BI, Tableau, or similar software. - Demonstrated experience in building and maintaining reports, dashboards, and data visualizations. - Strong data management skills, including data governance and quality assurance. Preferred Qualifications - Familiarity with supply chain management and sales forecasting processes. - Experience working with cross-functional teams and stakeholders in a collaborative environment. - Strong communication skills, with the ability to present insights to non-technical audiences. - A proactive mindset with a passion for continuous improvement and innovation. Your expertise could help shape Intel's sales operations to deliver exceptional outcomes for customers and business partners. Take this opportunity to join our team and be part of a dynamic, forward-thinking environment.

Job Type:

Experienced Hire

Shift:

Shift 1 (China)

Primary Location:

PRC, Shenzhen

Additional Locations:

Posting Statement:

Position of Trust

N/A

Work Model for this Role

Job Details:

Job Description:

Position Overview As a Yield Defect Metrology Engineering Intern, you will work alongside engineering teams to support yield improvement and defect reduction initiatives. You will gain firsthand experience in semiconductor manufacturing by analysing defect data, monitoring process performance, and participating in engineering investigations. This internship provides exposure to advanced manufacturing technologies, statistical data analysis, defect engineering, and process optimization. You will have opportunities to apply engineering concepts to real manufacturing challenges while developing analytical, technical, and problem-solving skills that are highly valued in the semiconductor industry. Key Responsibilities Yield Monitoring and Manufacturing Analytics • Support engineers in monitoring manufacturing performance indicators, defect trends, and process health metrics. • Assist in reviewing inspection and metrology data to identify unusual patterns and potential yield concerns. • Learn how Statistical Process Control (SPC) is applied in semiconductor manufacturing environments. • Participate in daily operational reviews and yield learning discussions. Data Analytics and Visualization • Analyze large manufacturing datasets using tools such as Microsoft Excel, Power BI, Python, or other analytics platforms. • Support development of dashboards, reports, and visualizations to improve engineering decision-making. • Assist in identifying defect trends, recurring issues, and potential yield improvement opportunities. • Present analysis findings to engineering mentors and stakeholders. Defect Analysis Support • Review and organize defect data generated from automated inspection systems. • Assist engineers in defect classification validation and data quality improvement activities. • Support investigations into defect excursions and manufacturing abnormalities. • Learn defect analysis methodologies commonly used in semiconductor manufacturing. Engineering Project Support • Participate in yield improvement and cost-reduction projects. • Support process improvement initiatives aimed at reducing defectivity and improving manufacturing performance. • Assist in data collection, analysis, documentation, and presentation of project outcomes. • Contribute to continuous improvement activities using structured problem-solving methods. Automation and Digitalization • Support development of data automation, reporting, and process-monitoring solutions. • Assist in creating scripts, dashboards, or visualization tools to improve operational efficiency. • Explore opportunities to leverage data science, machine learning, or automation techniques in manufacturing environments. • Learn how engineering data systems are used to drive operational excellence. Cross-Functional Collaboration • Collaborate with engineers, technicians, and manufacturing teams on assigned projects. • Participate in technical discussions and engineering reviews. • Gain exposure to interactions between Yield, Process Integration, Metrology, Manufacturing, and Quality organizations. • Prepare project updates and communicate findings effectively.

Qualifications:

Requirements: • Strong interest in semiconductor manufacturing, data analytics, or engineering problem-solving. • Good analytical and critical-thinking skills. • Strong attention to detail and willingness to work with large data sets. • Effective communication and teamwork abilities. • Self-motivated and eager to learn in a fast-paced manufacturing environment. Qualifications: Minimum Qualifications: • Bachelor's degree in a specialized field (e.g., Electrical Engineering, Mechanical Engineering, Materials Science, or related discipline). • Able to commit to a minimum internship period of 6 months. Preferred Qualifications • Familiarity with Microsoft Excel, Power BI, MATLAB, Python or other data analysis tools. • Basic understanding of statistics and data visualization. • Coursework or project experience involving data analysis, manufacturing, process control, or automation. • Strong presentation and communication skills. • Demonstrated curiosity and passion for solving technical challenges.

Job Type:

Student / Intern

Shift:

Shift 1 (Malaysia)

Primary Location:

Malaysia, Penang

Additional Locations:

Posting Statement:

Position of Trust

N/A

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

Job Details:

Job Description:

Intel is shaping the future of technology to help create a better future for the entire world. Our work in pushing forward fields like AI, analytics, and cloud-to-edge technology is at the heart of countless innovations. With a career at Intel, you'll have the opportunity to use technology to power major breakthroughs and create enhancements that improve our everyday quality of life. Join us and help make the future more wonderful for everyone. Want to learn more? Visit our YouTube Channel or the link below.

Life at Intel

The Role and Impact
As a SoC Power Thermal Performance Validation and Optimization Engineer, you will play an essential role in ensuring Intel's products achieve optimal power, thermal, and performance benchmarks at the system-on-chip (SoC) level. In this position, you will develop and execute validation methodologies, optimize hardware/software solutions, and perform SoC-level debugging to address power, thermal, and performance challenges. Your contribution will directly impact Intel's ability to deliver competitive, high-performing products to market.

Business Group
This role is part of Intel's Data Center Group (DCG), which focuses on designing innovative solutions to power the next generation of computing platforms for data centers. As a member of the PTP PreSi Correlation Solution team, you will contribute to shaping the development and validation processes for cutting-edge technologies, ensuring Intel meets and exceeds industry standards for performance and efficiency.

Key Responsibilities:

Develop and execute SoC-level power, thermal, and performance validation and optimization plans across Intel products.
Collaborate with architecture, design, firmware, and software teams to ensure power, thermal, and performance meet competitive targets and specifications.
Establish and execute methodologies for validating hardware/software optimizations and ensure alignment with business KPIs.
Perform SoC-level debug to identify root causes and resolve functional and triage failures related to power, thermal, and performance.
Configure and set up data loggers to collect and analyze thermal data.
Develop and maintain validation infrastructure, including performance monitors, behavioral checkers, and testing environments.
Produce comprehensive validation reports summarizing activities and results, and communicate findings effectively to relevant teams.
Drive continuous improvements to validation strategies, methodologies, and processes.

Well qualified candidates should possess the following behavioral traits:

• Strong analytical and problem-solving aptitude.

• Effective communication and documentation skills for cross-functional collaboration.

• Ability to work across team in multi-faceted groups (architecture, design, verification, firmware, software, and platform teams.)

Qualifications:

What we need to see (Minimum Qualifications):

Education:

Bachelors in electrical, Computer Engineering, or related field. A master's degree is preferred.

Experience:

• 3+ years of experience in SoC power and performance validation.

• 3+ years of experience in Pre-Si simulation and emulation.

• 3+ years of experience developing and / or optimization of power/performance KPI's.

Technical Skills (2+ Years of experience in each):

• Debugging experience for SoC-level power, thermal, and performance failures.

• Knowledge of hardware/software optimizations for power and performance.

• Experience of silicon verification, test program development and test plan execution.

• Knowledge of RTL language, in-circuit emulation and FPGA fast prototyping is an advantage.

• Experience with Python Programming language.

How to Stand out (Preferred Qualifications):

• Graduate degree (Masters or PhD).

• Knowledge of DSP, ETHERNET, and 3G/4G/5G.

• 2+ years' experience in SoC FPGA/Emulation function.

• 2+ years' experience with System (SoC) level debug using JTAG debuggers.

• 1+ year experience in Pre-Si functional design, validation, and/or HW/FW/SW integration.

• 1+ year experience on major Pre-Si platforms: logic simulation, virtual platform, FPGA, and/or emulation.

• Expertise in system-level power management of real-time processors and systems.

• Understand MIPI MPHY, JTAG, DDR, PCIe/USB/PCI-E/ETHERNET/SPMI bus protocol.

• Familiarity with validation tools such as data loggers, behavioral checkers, and state space coverage techniques.

• Familiar with system board design/debugging and usage of lab equipment like Oscilloscope and Logic analyzer.

•Knowledge of AI accelerators systems including GFX, NPU, NPP design and architecture.

• Experience with performance modeling, benchmarking, and validation infrastructure setup.

• Debugging experience for SoC-level power, thermal, and performance failures.

• Familiarity with validation tools such as data loggers, behavioral checkers, and state space coverage techniques.

• Knowledge of hardware/software optimizations for power and performance.

Benefits at Intel

Our total rewards package goes above and beyond just a paycheck. Whether you're looking to build your career, improve your health, or protect your wealth, we offer generous benefits to help you achieve your goals. Go to Intel Benefits | Intel Careers for details of benefits available to you. Intel reserves the right to modify, change or discontinue benefit plans at any time in its sole discretion.

Job Type:

Experienced Hire

Shift:

Shift 1 (United States of America)

Primary Location:

US, Texas, Austin

Additional Locations:

US, California, Folsom, US, California, Santa Clara, US, Oregon, Hillsboro

Posting Statement:

Position of Trust

N/A

Benefits

Annual Salary Range for jobs which could be performed in the US: $122,440.00-232,190.00 USD

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

Job Details:

Job Description:

As a SoC Logic Design Engineer, you will actively contribute to the development, coding, and simulation of system-on-chip (SoC) designs. You will integrate logic from various IP blocks and subsystems into a complete chip design, ensuring power, performance, area, and timing goals are met. Your work will directly impact the delivery of cutting-edge, high-quality SoC solutions that drive advancements in technology and innovation.

The role is part of Intel's Data Center Group (DCG), which focuses on delivering advanced solutions that enable data-centric computing for global industries. As a member of this organization, you will collaborate on projects that shape the performance, security, and efficiency of Intel's data center offerings, contributing to the broader infrastructure required for modern computing needs.

The primary responsibilities for this role will include, but are not limited to:

Design and implement logic for SoC blocks and subsystems using register transfer level (RTL) coding techniques.
Integrate IP blocks and subsystems into full chip SoC designs, ensuring seamless functionality.
Conduct quality checks across various aspects of logic design, from RTL coding to timing, power, and area convergence.
Optimize logic designs to meet power, performance, area, and timing targets.
Review verification plans and resolve failing RTL tests to ensure correctness of design features. - Collaborate with IP providers to integrate and validate IPs for SoC-level designs.
Follow secure development practices to meet security objectives and address security threats in designs.
Drive compliance with quality assurance standards for successful IP and SoC handoff.

Qualifications:

Minimum Qualifications:

Minimum qualifications are required to be initially considered for this position.

Bachelor's degree in Electrical Engineering, Computer Engineering, or related field, with 0-1 years of hands-on experience in logic design gained through internships, academic projects, coursework, or hands-on training OR a Master's degree in Electrical Engineering, Computer Engineering, or related field with no prior professional experience.
Advanced experience in register transfer level (RTL) coding languages such as Verilog or VHDL.
Basic knowledge with industry-standard tools for logic design, synthesis, and simulation (e.g., Synopsys Design Compiler, Cadence Xcelium).
Basic knowledge of power, performance, and area optimization in SoC designs.
Basic knowledge of timing analysis and static timing tools.

Preferred Qualifications:

Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Strong analytical and problem-solving skills with attention to detail.
Effective communication skills to collaborate with cross-functional teams.
Experience working on academic or industry projects involving SoC design and IP integration.
Passion for learning and contributing to advancements in semiconductor technology.

If you are eager to build a career in cutting-edge SoC design and want to be part of a collaborative, innovative, and dynamic environment, we encourage you to apply and join Intel in shaping the future of technology.

Job Type:

College Grad

Shift:

Shift 1 (United States of America)

Primary Location:

US, California, Santa Clara

Additional Locations:

US, California, Folsom, US, Oregon, Hillsboro

Posting Statement:

Position of Trust

N/A

Benefits

Annual Salary Range for jobs which could be performed in the US: $105,650.00-149,150.00 USD

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

Job Details:

Job Description:

Intel Korea is seeking a Sales Strategy Specialist to drive its next wave of growth across Sovereign AI, Agentic AI, Robotics, and other emerging domains.
This role goes beyond traditional sales. It combines business development, market intelligence, ecosystem engagement, and strategic thinking. You will work with customers, partners, government organizations, startups, and internal Intel teams to identify emerging opportunities, build go-to-market strategies, and accelerate long-term growth.
In this fast-moving environment, you will help Intel Korea enter new markets, form strategic partnerships, and commercialize next-generation technologies.

Key Responsibilities

Strategic Growth Initiatives

Identify and develop new business opportunities in AI infrastructure, sovereign AI, agentic AI, robotics, edge AI, and other emerging areas aligned with Intel Korea's growth priorities.
Manage a portfolio of strategic opportunities from early identification through commercialization and revenue.
Build business cases and growth strategies grounded in market analysis, ecosystem insights, and customer input.
Market Intelligence and Strategy
Track industry trends, customer investment priorities, competitors, and technology shifts across semiconductors and AI markets.
Turn market insights into actionable recommendations for Intel Korea's annual plan and long-term strategy.
Assess emerging customer segments, ecosystem players, and new market opportunities in Korea.

Ecosystem Development and Executive Engagement

Build relationships with customers, partners, startups, academia, government agencies, and other ecosystem stakeholders.
Support executive engagements with customer briefings, market insights, strategic messaging, and opportunity assessments.
Coordinate high-impact customer and partner engagements with Intel Korea and regional leadership.

Cross-Functional Leadership

Partner with sales, engineering, product, marketing, and regional teams to pursue growth opportunities.
Influence internal stakeholders and align resources behind strategic initiatives.
Connect market opportunities to Intel's technology, product, and solution portfolio.

Business Planning and Growth Execution

Contribute to Intel Korea's annual operating plan and long-term growth strategy.
Report regularly on the opportunity pipeline, ecosystem developments, and market trends.
Help prioritize investments and resources based on business impact and growth potential.

Qualifications:

Minimum Qualifications

Bachelor's degree in computer science, business, economics, or a related field.
3+ years of experience in business development, strategy, consulting, sales, market development, or related roles in the technology industry.
Solid understanding of the semiconductor, AI, cloud, or broader technology ecosystem.
Proven ability to turn emerging trends and market insights into business opportunities.
Demonstrated ability to work across multiple stakeholders in complex, fast-changing environments.
Strong communication, presentation, and executive engagement skills.
Fluency in Korean and English.

Preferred Qualifications

Experience in AI infrastructure, cloud, data center, robotics, autonomous systems, edge computing, or semiconductors.
Experience with startups, hyperscalers, system integrators, research institutions, or government-led technology programs.
Familiarity with Intel's compute, AI, networking, and edge portfolio.
Strong analytical skills in market analysis, business case development, opportunity assessment, and strategic planning.
Ability to work independently and influence without direct authority.
Entrepreneurial mindset with a track record of building new business.

Job Type:

Experienced Hire

Shift:

Shift 1 (Korea, Republic of)

Primary Location:

South Korea, Seoul

Additional Locations:

Posting Statement:

Position of Trust

N/A

Work Model for this Role

Job Details:

Job Description:

Role Summary

The Manufacturing Quality & Reliability Engineer drives product quality, manufacturing readiness, reliability assurance, and continuous improvement across semiconductor manufacturing operations. The role partners with development, engineering, operations, and customers to ensure robust product quality, successful new product introductions (NPI), and data-driven manufacturing excellence.

Key Responsibilities

Quality & Manufacturing Excellence

Lead manufacturing quality issue containment, investigation, and corrective actions.
Drive risk assessment, excursion management, and disposition of non-conforming materials.
Conduct audits and ensure compliance with quality standards and procedures.
Improve manufacturing quality, yield, reliability, and process capability.

New Product Introduction (NPI)

Support technology transfer from development to high-volume manufacturing.
Drive manufacturing readiness reviews and quality gate assessments.
Establish control plans, quality monitoring systems, and production controls.

Reliability & Data Analytics

Support reliability qualification and product risk assessments.
Apply statistical methods, SPC, DOE, and data analytics to identify quality risks and trends.
Develop dashboards and metrics to support data-driven decision making.

Continuous Improvement

Lead process improvement and cost reduction initiatives.
Drive CAPA effectiveness and standardisation of best practices.
Support operational excellence through quality-focused improvements.

Customer & Cross-Functional Engagement

Collaborate with engineering, operations, development, and quality teams.
Lead structured problem-solving activities using 8D and Root Cause Analysis.
Address customer quality concerns and drive sustainable solutions.

Semiconductor Test Quality (Preferred)

Experience with semiconductor test environments and platforms such as: Advantest V93K/Teradyne Test Systems/HPB-8/AMPS/ Chroma 3200

Qualifications:

Bachelor’s degree in electrical, Electronics, Mechanical, Chemical, Materials, Microelectronics Engineering, or related discipline.
Min > 6 years of Experience in Quality Engineering, Reliability Engineering, Manufacturing Engineering, Product or Process Engineering
Knowledge of quality tools such as FMEA, SPC, Cp/Cpk, Control Plans, CAPA, and Root Cause Analysis.
Strong analytical, problem-solving, and stakeholder management skills.
Experience with Excel, PowerPoint, JMP, SQL, or data analytics tools is an advantage.
Excellent communication and project management capabilities.

Job Type:

Experienced Hire

Shift:

Shift 1 (Malaysia)

Primary Location:

Malaysia, Kulim

Additional Locations:

Posting Statement:

Position of Trust

N/A

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

Job Details:

Job Description:

As an IP Design Verification Engineer, you will be responsible for ensuring the quality and functionality of critical IP designs through rigorous verification processes. Using industry-standard tools and methodologies, you will create and execute test plans, identify and resolve bugs, and contribute to delivering robust IP solutions. Your work will directly support the development of innovative technologies that power Intel's products and strengthen their position in the market.

Business group

The Data Center Group (DCG) focuses on developing advanced technologies that accelerate data processing and storage solutions for diverse industries. This group drives innovation in hardware and software, delivering cutting-edge products to serve growing market demands. As part of DCG, you will collaborate with teams working to redefine the capabilities of data center infrastructure, supporting Intel's mission to enable a smarter, connected world.

Key Responsibilities

Develop and implement test plans and verification strategies for IP designs using industry-standard tools and methodologies.
Identify, debug, and resolve design and verification issues to ensure robust functionality and quality.
Collaborate closely with cross-functional teams, including design, architecture, and validation teams, to identify and address potential challenges.
Generate comprehensive documentation for verification processes, test results, and design improvements.
Continuously improve verification efficiency through automation and innovative practices.

Qualifications:

This is an entry level position. You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum qualifications and are considered a plus factor in identifying top candidates. This position is not eligible for Intel immigration sponsorship

Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.

Minimum Qualifications

Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field with +1 year of hands-on experience.
+6 months of experience in:
- Hardware description languages such as Verilog or VHDL.
- Hands-on experience with verification tools like SystemVerilog, UVM, or similar environments. -
- Digital design principles and computer architecture.

Preferred Qualifications

Familiarity with scripting languages such as Python or Perl for automation purposes.
Strong analytical thinking and problem-solving skills to debug complex issues.
Familiarity with AI tools such as Claude, Copilot, Codex, etc.

Join us in driving innovation and shaping the future of data center technologies. Together, we can make a lasting impact on the world of computing.

Job Type:

College Grad

Shift:

Shift 1 (United States of America)

Primary Location:

US, California, Santa Clara

Additional Locations:

US, Massachusetts, Beaver Brook

Posting Statement:

Position of Trust

N/A

Benefits

Annual Salary Range for jobs which could be performed in the US: $105,650.00-149,150.00 USD

Work Model for this Role

Job Details:

Job Description:

Join Intel's AI Frameworks team in Guadalajara, Mexico as an intern and help optimize AI workloads using PyTorch Framework for current and next-generation Intel Xeon platforms.

You will work alongside experienced engineers on real-world AI performance and framework projects, contributing to PyTorch and its ecosystem while gaining hands-on experience with machine learning framework internals, model optimization, software performance analysis, and platform enablement.

Your work will help improve the experience and performance of AI applications used by developers and customers worldwide.

Business Group

As part of the Data Center Group (DCG), the PyTorch and AI Frameworks Ecosystem team focuses on developing cutting-edge solutions for artificial intelligence applications. This team is dedicated to enabling advancements in AI frameworks, tools, and systems that power the next generation of data center technologies and products.

Through collaboration, innovation, and a passion for technology, DCG supports Intel's broader mission to drive progress in high-performance computing and AI-powered solutions.

Responsibilities will include but are not limited to:

Supporting the enablement, profiling, debugging, and optimization of AI workloads and models running on Intel server platforms.
Contributing to PyTorch and ecosystem libraries, helping improve functionality, performance, and out-of-box experience on Intel hardware.
Investigating and resolving build, test, and runtime issues across Linux and Windows environments for specific AI models.
Collaborating with engineers across Intel and with the open-source community through GitHub issues, code reviews, and upstream contributions.
Documenting technical findings and contributing to team knowledge sharing.

The ideal candidate should show the following behavioral traits:

Strong analytical, and problem-solving skills.
Advanced English communication skills.
Willingness to learn about new technologies.
Effective communication and collaboration skills in multidisciplinary environments.

Qualifications:

Minimum qualifications are required to be initially considered for this position.

Currently pursuing a Bachelor's or Master's degree in Computer Science, Software Engineering, Computer Engineering, Artificial Intelligence, or a related field (at least 1 year remaining as active student).

6+ months of experience in:

- programming languages such as Python and C++.
- PyTorch Framework.
- Machine learning and deep learning concepts, algorithms, and methodologies.
- Git and collaborative software development practices.
- AI-assisted software development tools, including agentic AI solutions (such as Github Copilot, Claude Code).

Intermediate to advanced English level.

Requirements listed would be obtained through a combination of relevant industry job experience, internship experience, and/or schoolwork/classes/research.

Must have unrestricted, permanent right to work in Mexico (this role is not eligible for visa or immigration sponsorship).

Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Relevant experience in working with optimization techniques and performance tuning for AI models.
Familiarity with hardware-software integration in AI systems.
Knowledge of Git and collaborative software development practices

Join us in shaping the future of AI and make a meaningful impact through your work. Take the next step in your career with Intel, where innovation and growth are key.

A candidate who accepts an offer of employment in Mexico is required to present their own personal identification information and numbers for the following: Mexican Security Number (NSS), Tax Identification Number (RFC) and CURP identification number.

Job Type:

Student / Intern

Shift:

Shift 1 (Mexico)

Primary Location:

Mexico, Guadalajara

Additional Locations:

Posting Statement:

Position of Trust

N/A

Work Model for this Role

Job Details:

Job Description:

The Group:

Intel's Advanced Design Foundational IP Organization (AD-FIP) within Design Technology Platform (DTP) drives pathfinding and development of the analog/mixed-signal, RF, and high-speed I/O IP that defines what Intel Foundry's leading-edge process technologies can deliver. The AMS Design-Technology Co-Optimization (DTCO) team sits at the intersection of process technology, design rules, PDK, EDA tools, and circuit design, making sure each new node delivers competitive analog, mixed-signal, and custom-design density, performance, and productivity.

The Role:

We are seeking a senior technical leader in DTCO to define and drive co-optimization of Intel Foundry's next-generation process technologies for analog, mixed-signal, and custom design. You will identify where technology definition limits design outcomes (density, drive, matching, high-voltage support, layout productivity), quantify the impact, and drive resolution across process, design-rule, PDK, EDA, and design teams. This is a senior individual-contributor role with technical leadership across multiple organizations and external EDA partners.

Responsibilities:

Lead AMS DTCO for future Intel Foundry nodes: evaluate device architecture, front-end and back-end design rules, metal stack, and patterning choices against analog, mixed-signal, and custom-design requirements.
Run a closed-loop DTCO process: sense issues from designers, partners, and test chips; prioritize by PPA and productivity impact; drive rule, PDK, or flow changes; and validate the result on silicon and in design.
Quantify technology impact on circuits through layout studies, parasitic-aware benchmarking, and area and performance scaling analysis of representative AMS building blocks.
Define and drive design-rule and PDK requirements with process, design-rule, OPC, and quality and reliability teams, including high-voltage device support, density and fill rules, metal width and spacing options, and layout-dependent effects.
Partner with EDA vendors on node enablement for custom and AMS flows: custom layout, analog placement and routing, physical verification, fill, and extraction; translate tool and flow feedback into technology decisions.
Represent Intel Foundry in technical engagements with EDA partners and foundry customers, and present DTCO findings and recommendations to technology and business leadership.
Mentor engineers and set technical direction for the DTCO team.

Required Skills and Experience:

5+ years of DTCO experience for analog, mixed-signal, I/O, or custom design on FinFET or more advanced process nodes, at a foundry, an IDM technology-development organization, or an EDA vendor.
And experience in at least one of the following:
- Design-rule definition for analog or custom layout, including layout-pattern studies, layout-dependent effects, and test-structure design to evaluate rule impact.
- Circuit-level technology benchmarking of analog or mixed-signal building blocks: device-model and parasitic evaluation, matching, and area or performance scaling analysis.
- EDA tool or flow enablement of analog and custom design for a new process node: custom layout, analog placement and routing, physical verification, fill, or extraction.

Preferred Skills and Experience:

Hands-on analog, mixed-signal, or RF circuit design experience (for example PLLs, data converters, regulators, high-speed I/O, LNAs, PAs, or mmWave front ends), with an understanding of how device and interconnect parameters drive circuit performance.
Analog and RF device and passive technology: precision resistors, MIM/MOM capacitors, inductors and transformers, varactors, analog and RF device flavors, and RF figures of merit such as fT, fmax, and noise figure.
Experience across two or more of the areas in the minimum qualifications, or across both foundry and EDA environments.
High-voltage or extended-voltage device integration on advanced CMOS nodes.
Analog or custom layout design experience.
Gate-all-around transistors, backside power delivery, or advanced multi-patterning (SALELE, EUV) technology definition as it affects analog and custom layout.
Automation of DTCO studies using Python, layout generators, or machine learning.
Customer-facing technical engagement with foundry customers or EDA partners.
Publications at IEDM, VLSI Symposium, CICC, ISSCC, or RFIC; patents in DTCO, design rules, design enablement, or AMS/RF circuits.
Technical leadership across process, design, and EDA organizations, including driving technology-definition decisions at node level.

Qualifications:

Advanced degree in Electrical Engineering, Computer Engineering, Materials Science, Physics, or a related field
Industry experience in semiconductor technology development, design enablement, or circuit design
Master's degree with 15+ years of experience OR Ph.D. with 12+ years of experience.

Job Type:

Experienced Hire

Shift:

Shift 1 (United States of America)

Primary Location:

US, Oregon, Hillsboro

Additional Locations:

US, California, Santa Clara

Posting Statement:

Position of Trust

This role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Recruiter.

Benefits

Annual Salary Range for jobs which could be performed in the US: $220,920.00-311,890.00 USD

Work Model for this Role

Job Details:

Job Description:

As a Module Development Engineer, you will play a critical role in driving Intel's process innovation and technology advancement. In this role, you will design, optimize, and deliver sophisticated manufacturing processes, enabling the production of groundbreaking device architectures. Your expertise in process integration, equipment solutions, and material selection will directly contribute to shaping the future of Intel technologies and ensuring manufacturing excellence.

The Module Development Engineer position is part of Intel Corporation, a global leader in semiconductor innovation that designs and manufactures leading-edge technologies powering countless devices and solutions worldwide. The team is focused on developing advanced manufacturing processes and technologies that underpin high-volume production and enable Intel's future roadmap. By collaborating across disciplines and working closely with industry partners, the group drives innovation to maintain Intel's leadership in the technology domain.

Key Responsibilities

Lead the design and optimization of advanced manufacturing processes to meet device specifications and functional requirements.
Conduct feasibility studies and simulations to enable development of innovative device architectures.
Develop roadmaps for process technologies to meet future product and production needs.
Partner with equipment and material suppliers to implement enabling technologies.
Recommend and execute modifications to equipment and manufacturing techniques to improve production efficiency and output.
Design, qualify, and optimize processes involving material selection, parameter tuning, and equipment metrology.
Perform pathfinding activities to support process and hardware development for emerging technologies.
Remain current with industry trends and develop strategic insights to drive technology advancements and cost-effective solutions.

Qualifications:

You must possess the minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Relevant experience can be obtained through schoolwork, classes, project work, internships, and/or military experience.

Minimum Qualifications

Bachelor's degree in a relevant field such as Materials Science, Chemical Engineering, Mechanical Engineering, or a related technical discipline.
4+ years of experience in lithography process development, integration, or manufacturing in the semiconductor industry.

Preferred Qualifications

Master's degree in a relevant field with 4+ years of hands-on experience, or PhD with 2+ years of experience.
Strong technical knowledge in areas such as lithography process optimization, resist selection, equipment selection, and manufacturing technologies.
Demonstrated ability to collaborate with external suppliers and internal cross-functional teams to achieve technical and operational goals.
Experience in leading pathfinding activities or roadmap development for advanced processes and technologies.
Knowledge of semiconductor process flow and high-volume manufacturing environments.
Strong problem-solving skills, analytical thinking, and the ability to make data-driven decisions.
Effective communication and collaboration skills, with a proven ability to lead initiatives and influence outcomes across diverse teams.

Join us in shaping the future of semiconductor technology as part of Intel's innovative team of engineers. Your contributions will fuel groundbreaking advancements, enabling next-generation devices and solutions that transform industries and everyday life. Apply today to be part of our journey toward driving technology breakthroughs that make a global impact.

Job Type:

Experienced Hire

Shift:

Shift 1 (United States of America)

Primary Location:

US, New Mexico, Albuquerque

Additional Locations:

Posting Statement:

Position of Trust

N/A

Benefits

Annual Salary Range for jobs which could be performed in the US: $133,800.00-255,200.00 USD

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

Job Details:

Job Description:

As a Module Development Engineer, you will play a critical role in advancing Intel's manufacturing capabilities to shape the future of technology. You will design and develop cutting-edge manufacturing processes, optimize equipment metrology, and enable new product designs to meet evolving device specifications. Your expertise will drive innovations in process integration and equipment solutions, helping Intel deliver groundbreaking technologies with precision and efficiency.

This position is part of Intel Corporation's manufacturing organization, which is dedicated to driving innovation in semiconductor manufacturing to support Intel's industry-leading product roadmap. The team develops and optimizes advanced processes and technologies that enable Intel's commitment to creating world-changing technology.

Key Responsibilities

Develop and optimize sophisticated manufacturing processes and repair reverse engineering, including material selection, parameter optimization, equipment metrology, and system design.
Conduct feasibility studies using theoretical simulations and practical engineering methods to meet desired device specifications.
Define and execute technology development roadmaps for future device architectures and high-volume manufacturing.
Partner with equipment and materials suppliers to design and implement enabling elements for new technologies.
Recommend and implement modifications to operating equipment to improve production efficiency, manufacturing techniques, and optimize output for existing products.
Stay informed on industry trends in process and material manufacturing, and collaborate with vendor ecosystems to drive cost-sensitive technology roadmaps forward.

Qualifications:

Minimum Qualifications

Bachelor's degree in a relevant field such as Materials Science, Chemical Engineering, Mechanical Engineering, or a related technical discipline.
1+ years of experience in lithography process development, integration, or manufacturing in the semiconductor industry.

Preferred Qualifications

Master's degree in a relevant field with 2+ years of hands-on experience, or PhD
Strong technical knowledge in areas such as lithography process optimization, resist selection, equipment selection, and manufacturing technologies.
Demonstrated ability to collaborate with external suppliers and internal cross-functional teams to achieve technical and operational goals.
Experience in leading pathfinding activities or roadmap development for advanced processes and technologies.
Knowledge of semiconductor process flow and high-volume manufacturing environments.
Strong problem-solving skills, analytical thinking, and the ability to make data-driven decisions.
Effective communication and collaboration skills, with a proven ability to lead initiatives and influence outcomes across diverse teams.

Intel offers you the opportunity to be part of a dynamic and inclusive work environment focused on innovation and excellence. Join us to shape the future of technology and make a meaningful impact in semiconductor manufacturing. Apply today to start your journey with a global leader in technology development.

Job Type:

Experienced Hire

Shift:

Shift 1 (United States of America)

Primary Location:

US, New Mexico, Albuquerque

Additional Locations:

Posting Statement:

Position of Trust

N/A

Benefits

Annual Salary Range for jobs which could be performed in the US: $99,030.00-188,890.00 USD

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

Job Details:

Job Description:

About the Team

The Hard IP Development Group (HIPD) within Intel's Central Engineering Organization is responsible for developing leadership IPs that are power-winning products for Server, Client, and Networking SOCs, as well as Intel Foundry Customers. HIPD develops a broad portfolio of Serial and Parallel IO PHYs including PCIe, USB, TypeC, UCIe Die-to-Die, DDR/LPDDR, and Ethernet PHYs.

The Electrical Validation and Debug group within HIPD is a dynamic and versatile team of engineers who directly engage with both IP design teams and SOC customers in IP validation and debug for test chips and products. These engineers embody our SOC customer obsession by validating mixed signal IPs and quickly resolving hurdles through hands-on debug.

This position is exciting and challenging, offering the opportunity to exercise your mixed signal design, architecture, and post-silicon debug expertise across all HIPD IPs, Client, and Server SOC teams.

Position Overview

This role focuses on mixed signal high-speed PHY post-silicon validation and debug, spanning IP enabling, customer sighting resolution, and cross-functional collaboration with SOC teams.

Key Responsibilities

• Generate test plans and test content for mixed signal high-speed PHY post-silicon validation, including characterization of Clocking, Transmitter, and Receiver blocks

• Perform IO protocol debug across one or more of the following: PCIe, UCIe, DDR, or Ethernet, from both PHY recipe and firmware perspectives

• Conduct SOC board design reviews, provide recommendations, and support post-silicon debug activities

• Represent the IP team during SOC Power-Ons for test chips and products, providing hands-on IP enabling support through proper recipes and firmware versions for PCIe, UCIe, and USB PHYs

• Identify clocking and PHY-related silicon issues, investigate, debug, and disposition customer bugs and sightings in a timely manner

• Reproduce customer issues and drive root cause analysis through failure analysis and structured debug methodologies

You Should Demonstrate the Following Professional Traits to Be Successful

Customer obsession with a strong sense of urgency in resolving technical issues
Versatility and adaptability when engaging across multiple teams, IPs, and debug scenarios
Collaborative mindset with the ability to work effectively with both IP design teams and SOC customers

Qualifications:

Minimum Qualifications

• BS with 6+ years, MS with 4+ years, or PhD with 2+ years of experience in Electrical Engineering, Computer Engineering, or a related field

• Relevant years of experience (as outlined above) in electrical or bench post-silicon validation with one or more high-speed PHYs such as PCIe, USB, UCIe, DDR, Ethernet, or equivalent interface experience

The experience must also include:

• Experience with lab hardware and software including Oscilloscopes, Logic Analyzers, Protocol Analyzers, and BERTs

• Knowledge of one or more industry-standard IO specifications such as PCIe, USB, or Die-to-Die UCIe

Preferred Qualifications

• Experience with mixed signal IP characterization including PLLs, TX and RX jitter characterization

• Experience leading IP debug efforts as situations arise, in addition to hands-on debug execution

• Signal integrity and power delivery knowledge

• Pre-silicon design or simulation experience in logic, circuits, firmware, MRC, or mixed signal validation

Job Type:

Experienced Hire

Shift:

Shift 1 (United States of America)

Primary Location:

US, California, Folsom

Additional Locations:

US, California, Santa Clara

Posting Statement:

Position of Trust

N/A

Benefits

Annual Salary Range for jobs which could be performed in the US: $141,910.00-200,340.00 USD

Work Model for this Role

Job Details:

Job Description:

About the Role

Join Intel's graphics software team and help deliver high-quality GPU experiences in AI domain.

As a GPU Software Engineer, you will develop, validate, debug, and optimize graphics software and GPU driver solutions across Intel platforms. You will work at the intersection of software and hardware, partnering with engineering teams to bring new graphics capabilities to market and solve complex system-level issues.

This is an opportunity to develop hands-on expertise across GPU architecture, graphics drivers, validation, debugging, performance, compute, and AI workloads.

What You’ll Do

Key responsibilities will include but not limited to:

Develop and execute end-to-end validation solutions for GPU software, graphics drivers, and applications.
Debug and resolve complex software, driver, and system-level issues impacting GPU functionality, quality, and performance.
Triage defects, perform root-cause analysis, and collaborate with software and hardware engineering teams to drive issues to resolution.
Develop and maintain software, automation, and debugging tools that improve validation efficiency and product quality.
Analyze cross-component interactions and identify potential quality, performance, and compatibility issues.
Perform validation, triage, and debugging of GPU compute drivers, runtime layers, and AI framework integration failures across software and hardware teams.
Integrate latest AI features into end-to-end validation flows and analyze cross-component interactions to develop robust test scenarios.
Develop and maintain automation tools, benchmarking suites, and frameworks to improve validation and debug efficiency across AI compute and runtime components.
Optimize software performance, memory efficiency, and quality for emerging AI workloads, deep learning inference, and agentic applications.
Enable and validate forthcoming AI hardware acceleration capabilities for Intel's GPU platforms.
Collaborate on cross-OS software development and validation for GPU-accelerated AI and machine learning workloads.

Behavioral traits that we are looking for:

Technical curiosity: Motivated to understand how software, GPU hardware, drivers, operating systems, and applications interact.
Problem-solving: Uses structured analysis and data to troubleshoot complex technical issues and identify root causes.
Proactive ownership: Identifies potential issues or opportunities early, takes initiative, and follows problems through to resolution.
Collaboration: Works effectively across software, hardware, validation, and architecture teams to solve cross-functional problems.
Communication: Clearly communicates technical findings, risks, and recommendations to technical stakeholders.
Learning agility: Quickly learns new GPU architectures, graphics technologies, tools, APIs, and development environments.
Quality mindset: Demonstrates attention to detail and considers product quality, reliability, performance, and the end-user experience when making technical decisions.
Adaptability: Effectively manages changing requirements and priorities in a fast-paced engineering environment

Intel invests in our people and offers a complete and competitive package of benefits employees and their families through every stage of life.

See Intel Benefits for more details.

Qualifications:

Note:

For information on Intel’s immigration sponsorship guidelines, please see

Intel U.S. Immigration Sponsorship Information

Minimum Qualifications and Experience:

Bachelor's degree in Computer Science, Computer Engineering, Electrical Engineering, or a related field with 3+ years of relevant experience; OR
Master's degree in the field with 1+ years of relevant experience.

Your experience described above must be in the following:

Software development using C, C++, or Python.
Experience with AI validation workloads such as LLM inference evaluation, and agentic framework integration.
Hands-on experience with machine learning frameworks and runtimes such as PyTorch, OpenVINO, ONNX Runtime, or TensorFlow.
Experience with industry-standard APIs and frameworks such as DirectX, OpenGL, OpenCL, or Vulkan.

Preferred Qualifications and Experience:

Experience with validation, triage, or debugging computer graphics hardware and software.
Proven expertise in optimizing GPU compute software for throughput and latency (e.g., operator fusion, KV-cache optimization, low-bit quantization like INT4/INT8/FP8).
Familiarity with cross-OS profiling and debug tools such as WinDbg, GPUView, GDB, Intel VTune, emulators, or JTAG-debuggers.
Experience with CI/CD practices, automated validation frameworks, and containerized cross-platform testing environments.
Strong collaboration skills and passion for staying updated on emerging AI algorithms and hardware acceleration technologies.

Why Join Intel?
Help shape the future of GPU computing by developing and validating graphics technologies that power gaming, content creation, media, and emerging AI experiences. You'll solve challenging problems across hardware and software while working with engineers bringing next-generation Intel graphics capabilities from development to real-world products.

Job Type:

Experienced Hire

Shift:

Shift 1 (United States of America)

Primary Location:

US, California, Folsom

Additional Locations:

Posting Statement:

Position of Trust

N/A

Benefits

Annual Salary Range for jobs which could be performed in the US: $111,030.00-211,200.00 USD

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

Job Details:

Job Description:

The Compiler Engineering team within Intel's Data Center Group is seeking talented and passionate compiler engineers to help shape the future of software development.

At Intel, we are building next-generation software technologies that unlock the full potential of heterogeneous computing. Our compiler technologies enable developers to efficiently leverage CPUs, GPUs, and accelerators through high-performance, portable software. Our mission is to design, innovate, and deliver industry-leading compilers and development tools that maximize hardware performance across Intel platforms. By advancing performance, scalability, reliability, and developer productivity, we empower AI, HPC, and other compute-intensive workloads while maintaining a strong commitment to open-source collaboration and innovation.

Our team develops LLVM-based compiler technologies for C, C++, SYCL, Triton, MLIR, domain-specific languages (DSLs), and Fortran, targeting Intel CPUs and GPUs. We work across the entire compiler stack, including language front ends, intermediate representations, optimization frameworks, code generation, debug information, runtimes, offload support, quality engineering, and developer tooling.

This role provides exceptional opportunities for technical growth and career development through hands-on work with cutting-edge compiler technologies, mentorship from experienced engineers and technical leaders, and collaboration with world-class engineering teams across the globe.

Responsibilities

As part of the compiler performance and optimization team, you will gain firsthand experience in the technologies that transform source code into highly optimized machine code. Your responsibilities will include:

Analyzing performance issues in compiler-generated code and identifying root causes within optimization and code generation stages.
Measuring and tuning application performance on Intel CPUs and GPUs while tracking regressions and identifying optimization opportunities.
Designing and implementing automated testing solutions to continuously monitor compiler performance and quality.
Bridging Intel hardware and compiler capabilities with AI and HPC software ecosystems, including PyTorch, inference frameworks, and machine learning workloads.
Contributing to open-source compiler communities through issue reporting, patch development, code reviews, and technical discussions.
Developing and enhancing compiler components, including optimization passes, code generation features, runtime systems, and offload technologies under the guidance of senior engineers.
Building expertise in specialized areas such as compiler optimizations, backend code generation, heterogeneous computing, offload compilation, or workload performance analysis.

As a software engineer on our team, you will collaborate with a diverse, global group of engineers and have the opportunity to influence the future of compiler technology, developer tools, and high-performance computing software.

Qualifications:

Minimum Qualifications:
Candidates must possess one of the following:

Master's degree in Computer Science, Computer Engineering, Electrical Engineering, or a related technical field with 1+ year of experience in compiler development, compiler performance analysis, or compiler optimization.

Bachelor's degree in Computer Science, Computer Engineering, Electrical Engineering, or a related technical field with 2+ years of experience in compiler development, compiler performance analysis, or compiler optimization.

Completed academic coursework in data structures and/or algorithms.

Preferred Qualifications:

Strong written and oral communication skills, with the ability to clearly communicate technical details and concepts.
Precise attention to detail and genuine motivation to learn and improve product performance.
Familiarity with Intel x86 instruction set architecture and Advanced Vector Extensions, or with GPU architecture and execution models.
Exposure to LLVM or MLIR compiler infrastructure, or to GCC.
Experience with parallel and heterogeneous programming models such as OpenMP, SYCL, OpenCL, Triton, or CUDA.
Experience with performance analysis tools and methodology on real-world applications.
Exposure to AI/ML frameworks and inference stacks.
Open-source contribution history.
Demonstrated ability to analyze and solve complex technical problems.

Job Type:

Experienced Hire

Shift:

Shift 1 (Canada)

Primary Location:

Canada, Toronto

Additional Locations:

Posting Statement:

Position of Trust

N/A

Annual Salary Range for jobs which could be performed in Canada

CAD 114,890.00-162,190.00

Salary range dependent on a number of factors including location and experience.

Work Model for this Role

Canada Accommodation:

Intel is committed to a culture of accessibility. Intel provides accommodations to applicants and employees with disabilities. Find information and request accommodation here.

Job Details:

Job Description:

The Role and Impact

Intel's advanced packaging technology development organization is seeking a Module Development Engineer to support the development of next-generation semiconductor packaging technologies, with a focus on 3D Integrated Circuit (3D IC) technology and advanced manufacturing processes.

In this role, you will contribute to the development, evaluation, and optimization of semiconductor manufacturing processes that enable future technology generations. Working closely with engineering and manufacturing teams, you will help develop innovative process solutions, address complex technical challenges, and support the introduction of new technologies into the factory.

This position offers the opportunity to work on cutting-edge semiconductor technologies while contributing to Intel's continued leadership in advanced packaging and 3D IC development.

Key Responsibilities

Develop, evaluate, and optimize semiconductor manufacturing processes supporting next-generation 3D IC and advanced packaging technologies.
Support technology development initiatives focused on introducing new processes and manufacturing capabilities for future technology generations.
Conduct process characterization, experimental evaluations, and data analysis to identify opportunities for process improvement.
Apply statistical process control (SPC), design of experiments (DOE), and engineering analysis techniques to evaluate process performance and support technology development.
Troubleshoot manufacturing process and equipment challenges, perform root cause analysis, and implement corrective actions to improve process performance.
Collaborate with cross-functional engineering teams to support process integration, equipment development, and manufacturing readiness.
Participate in the evaluation, qualification, and optimization of manufacturing equipment and process technologies.
Work with engineering and manufacturing teams to identify opportunities for process automation, efficiency improvements, and technical innovation.
Document experimental results, technical findings, and process development activities to support engineering decisions and future technology implementation.
Contribute to the successful development and transfer of next-generation semiconductor packaging processes.

Qualifications:

Minimum Qualifications
Candidates must possess one of the following:

Bachelor's degree in Materials Science, Mechanical Engineering, Chemical Engineering, Electrical Engineering, Physics, Chemistry, or a related STEM field with 4+ years of of experience in semiconductor manufacturing, process development, or equipment development.

Master's degree in the same fields with 3+ years of experience in semiconductor manufacturing, process development, or equipment development.

PhD in the same fields with no prior industry experience required.

Additional Technical Requirement

1+ year of combined experience across the following areas:
- Statistical Process Control (SPC) and/or Design of Experiments (DOE).
- Semiconductor processing, system controls, or mechanical systems.

Preferred Qualifications

Experience programming or developing engineering solutions using Python and/or MATLAB.
Hands-on experience with robotics, equipment automation, machine vision, or image processing systems.
Experience troubleshooting semiconductor manufacturing equipment or processes, including root cause analysis and corrective action implementation.
Experience with semiconductor packaging processes, including advanced packaging technologies.
Experience with equipment development, automation development, or engineering project management.

We welcome your expertise and creativity to join Intel's dynamic team, where you can make a meaningful impact on the future of semiconductor technology. Apply today and take the next step in your career.

Job Type:

Experienced Hire

Shift:

Shift 1 (United States of America)

Primary Location:

US, Oregon, Hillsboro

Additional Locations:

Posting Statement:

Position of Trust

N/A

Benefits

Annual Salary Range for jobs which could be performed in the US: $133,800.00-188,890.00 USD

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

Job Details:

Job Description:

Intel Corporation is the world's largest semiconductor company and a global leader in computing innovation. Our Quantum Computing Group represents Intel's bold venture into the next frontier of computing technology, leveraging our decades of semiconductor manufacturing expertise to develop silicon-based quantum processors. We're pioneering spin qubit technology in silicon quantum dots, combining cutting-edge quantum physics with Intel's unmatched manufacturing capabilities to create the world's first commercially viable quantum computers. Our collaborative approach spans the entire quantum compute stack while harnessing the power of Intel's 18A process and design infrastructure. We are seeking an exceptional Quantum Design Engineer to join our pioneering quantum computing team. In this position, you will be joining a team of incredibly talented engineers focused on the challenging task of scaling our quantum computing chips to millions of qubits. Here you will be involved in all aspects of the qubit chip process from initial conception through Process-Design-Kit definition, design execution and tapeout, along with ensuring silicon runs smoothly in fab and final system integration. You'll work closely not only with our qubit, control, system integration, and software/algorithms teams, but also with teams in Foundry lithography, process and design. You'll be working at the intersection of cutting-edge semiconductor technology and quantum physics, creating solutions that push the boundaries of what's possible in computing. Ready to help build the future of quantum computing? Apply now and be part of this extraordinary journey Key Responsibilities • Work alongside lithography, process integration, measurement, and PDK engineers to establish qubit processes and design rules • Architect qubit and readout element standard cell design and automation • Engage with TCAD and PDK engineers and design tool vendors to create qubit and read-out universal process files and qubit level models and extraction capability • Partnering with quantum software and control engineers to analyze tradeoffs on quantum error correction schemes vs qubit topology • Design automation to enable front end design automation and routing generation for enabling routing of large scale quantum processors • Creation of Automated Place and Route flows to enable qubit routing, including AI and machine-based learning routing optimization for large I/O counts • Working with PDK engineers and design tool vendors to create new customized EDA tool capability to enable routing of large-scale quantum processors • Drive signal integrity analysis to define routing strategies for large scale qubit processors and work to define and release customized PDKs • Perform signal integrity analysis and optimization for qubit processors to ensure optimal performance for signal integrity and crosstalk • Working with PDK engineers and design tool vendors to create new signal extraction capability for large scale quantum processors • Work in a collaborative team to execute design of qubit processors from PDK implementation through Tapeout and Fab NPI • Perform industry standard design validations such as DRC, LVS, and Extraction prior to tapein signoff • Work closely with Control, Packaging and System teams to co-design Interposer interfaces and routing strategies for bridging the Qubit processor to ASIC control • Designing and taping out electrical characterization test structures to characterize qubit and interconnect performance and yield • Working with PDK engineers and design tool vendors to create new customized EDA tool capability to enable thermal analysis of large scale quantum processors • Implement PDK collateral into customized design environments and create and maintain customized design workflows for qubit processors • Working with external customers to understand their needs and provide solutions based on Intel's quantum PDK • Ensure successful implementation of Intel quantum PDK design collateral and EDA tool capabilities for External Customers • Ensuring external customer designs are successfully taped out with silcon run to end-of-line on schedule As a successful candidate, you must possess • Excellent communication and presentation skills for technical and non-technical audiences • Keen experimental insight with the ability to design and focus on practical implementations • High motivation and enthusiasm for self-directed, hands-on work • Creativity and flexibility to thrive under changing priorities and evolving program needs • Strong analytical thinking and problem-solving capabilities • Collaborative mindset with ability to work effectively across diverse teams • Adaptability to work in a fast-paced, innovative environment • Leadership potential to drive independent R+D initiatives • Passion for pushing the boundaries of quantum technology development Join Intel's Quantum Computing Group and be part of a team that's not just researching quantum computing - we're building it. If you're passionate about combining cutting-edge quantum physics with real-world applications and want to work with the resources and expertise of the world's leading semiconductor company, we want to hear from you. Apply today and discover your place in our world-changing work.

Qualifications:

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.

Minimum Qualifications:
• Bachelor's degree with 4 years of experience, Master's degree with 3 years of experience, or Ph.D. degree in Physics, Electrical Engineering, Cryogenic Engineering, Quantum Technologies, or Quantum Engineering or related Engineering field
• Must possess 1+ years experience with at least one of the following:
o Electromagnetic (EM) modeling and simulation tools and their application to signal integrity/crosstalk analysis for high-speed/high-density on-chip/on-package interconnect
o Standard cell design, design automation flow implementation (SKILL, VSR, MSOA or equivalent), and universal process file models and extraction
o Digital design tools and APR based routing design and ability to script and configure APR tools with languages such as TCL
o Designing and taping out designs on a mainstream foundry process PDK including running all industry standard validations such as DRC, ERC, LVS, PEX.
o Implementing PDK collateral and design flows to enable and maintain design environments

Preferred Qualifications:
• 1+ years of experience with:
o Electrical measurement experience with qubit, quantum devices, transistors, or integrated circuits
o Process-Integration experience with qubit or CMOS devices or interconnects
o Experience with dilution refrigerators or other cryogenic systems
o RFIC design or experience with cryogenic control of qubits
o Design of superconducting circuits and superconducting interconnects
o Programming, software, or driver development and scripting for task automation using languages such as Python
o Implementing Machine Learning or AI based digital design routing algorithms
o Working with EDA tool vendors to enable customized design solutions

Benefits at Intel

Job Type:

Experienced Hire

Shift:

Shift 1 (United States of America)

Primary Location:

US, Oregon, Hillsboro

Additional Locations:

US, Arizona, Phoenix, US, California, Folsom, US, California, Santa Clara, US, Massachusetts, Beaver Brook, US, New York, New York, US, Pennsylvania, Allentown, US, Texas, Austin

Posting Statement:

Position of Trust

N/A

Benefits

Annual Salary Range for jobs which could be performed in the US: $141,910.00-269,100.00 USD

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

Job Details:

Job Description:

The Role and Impact

As a Process Integration and Yield Engineer, you will play a pivotal role in driving technology improvement and manufacturing excellence. You will define process integration roadmaps, analyze large volumes of structured and unstructured data, and implement solutions that enhance quality, yield, and defect reduction. Working across internal and external teams, your contributions will directly support ramping advanced packaging solutions and sustaining high-volume manufacturing processes.

Business Group

Join Intel Corporation's global team responsible for advancing technology solutions that enable high-volume manufacturing and yield improvement. This group focuses on integrating innovative processes and driving continuous improvement, ensuring Intel delivers high-quality, reliable products for customers worldwide. Be part of a collaborative environment committed to shaping the future of technology and solving complex challenges.

Key Responsibilities

- Define and establish process flows, procedures, and equipment configurations for manufacturing modules.
- Extract insights from data using statistical analysis, coding, and machine learning techniques.
- Drive yield analysis and defect reduction initiatives to support process improvement.
- Conduct quality and reliability risk assessments for manufacturing materials and process changes.
- Collaborate with cross-functional teams to ensure successful technology transfer and ramp-up activities.
- Develop monitoring systems, dashboards, and methodologies to sustain and enhance manufacturing performance.
- Lead low yield analysis and yield improvement activities in both startup and high-volume manufacturing environments.

The ideal candidate should exhibit the following behavioral traits:

Strong troubleshooting skills and innovative problem-solving approaches.
Excellent verbal and written communication skills.

Qualifications:

Minimum Qualifications

- Bachelor's degree in Chemical Engineering, Electrical Engineering, Mechanical Engineering, Material Science, Microelectronics Engineering, Chemistry, Physics, or related field and 4+ year of experience.

Master’s degree in the fields above with 3+ years of experience.

PhD degree in the fields above with 1+ years of experience.

Experience listed above should be a combination of the following:

Experience in semiconductor manufacturing or advanced packaging.
Expertise in process integration, defect reduction, and backend interconnect or advanced packaging processes.
Experience in statistical analysis tools such as JMP, SQL, and statistical process control (SPC).
Experience with Design of Experiments (DOE) principles and Failure Mode Effects Analysis (FMEA)

Preferred Qualifications

Experience presenting yield summaries and engaging with external foundry customers.
Demonstrated ability to analyze defects and parametric data to drive yield improvements
Proven track record in new semiconductor technology development and transfer.

Take the next step to advance your career by joining Intel, where you can make a meaningful impact on cutting-edge technologies that shape the future.

Job Type:

Experienced Hire

Shift:

Shift 1 (United States of America)

Primary Location:

US, New Mexico, Albuquerque

Additional Locations:

US, Oregon, Hillsboro

Posting Statement:

Position of Trust

N/A

Benefits

Annual Salary Range for jobs which could be performed in the US: $120,860.00-231,670.00 USD

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

Job Details:

Job Description:

The Compiler Engineering team within Intel's Data Center Group is seeking talented and passionate Senior Compiler Engineers to help shape the future of high-performance computing and AI software.

At Intel, we are developing next-generation software technologies that unlock the full potential of heterogeneous computing. Our compiler technologies enable developers to efficiently leverage CPUs, GPUs, and accelerators through high-performance, portable software. As part of our team, you will contribute to an ecosystem that advances performance, scalability, reliability, and developer productivity for AI, HPC, and other demanding workloads, while supporting Intel's commitment to open-source innovation and collaboration.

The Intel Compiler Engineering team develops LLVM-based compiler technologies for C, C++, SYCL, Triton, MLIR, Fortran, and Domain-Specific Languages (DSLs), targeting Intel CPU and GPU architectures. We work across the entire compiler stack and collaborate closely with hardware architecture teams, covering language front ends, intermediate representations, optimization, code generation, debug information, runtimes, heterogeneous and offload computing, quality engineering, and developer tools. Our work bridges Intel hardware capabilities with leading AI frameworks and software ecosystems, including PyTorch, machine learning frameworks, and inference platforms.

Responsibilities

As a Senior Compiler Engineer, you will play a key role in advancing compiler technologies that deliver industry-leading performance and scalability across Intel architectures. You will take ownership of complex technical challenges from concept to production and drive solutions that have a broad impact across products and workloads.

In this role, you will:

Lead performance analysis of real-world applications, AI and HPC workloads, and industry-standard benchmarks, identifying bottlenecks across compilers, runtimes, libraries, and processor architectures.
Design, develop, and deliver compiler optimizations and code generation enhancements that enable new Intel CPU and GPU capabilities, taking innovations from prototype through production-quality implementation.
Own performance for specific compiler components or workload domains by defining targets, tracking results through continuous integration systems, and driving measurable improvements.
Advance heterogeneous and offload compilation technologies across SYCL, OpenMP, Triton, MLIR, and DSL-based programming models, improving portability while maintaining exceptional performance.
Collaborate closely with hardware architects to influence the design and enablement of future Intel silicon through compiler and programming model innovations.
Drive engagement with upstream open-source communities through technical design proposals, RFCs, code contributions, and peer reviews.
Influence technical strategy, architectural decisions, and engineering best practices through design reviews, code reviews, and cross-team collaboration.
Mentor and develop junior engineers while serving as a technical leader and trusted partner to internal stakeholders, customers, and the broader software ecosystem.

As a senior engineer, you will have significant opportunities to deepen your technical expertise, influence product direction, and help define the future of compiler technologies, developer tools, and high-performance software platforms.

Qualifications:

Minimum Qualifications:

Candidates must possess one of the following:

Bachelor's degree in Computer Science, Computer Engineering, Electrical Engineering, or a related technical field with 6+ years of experience in compiler development, compiler performance analysis, or compiler optimization.

Master's degree in the same fields with 3+ years of experience in compiler development, compiler performance analysis, or compiler optimization.

PhD in the same fields with no additional industry experience required.

The required years of experience must include experience in the following technical areas:

Compiler development and performance optimization.
Software workload performance analysis, debugging, and optimization.
Software development or optimization using modern C++ and compiler technologies.

Preferred Qualifications:

Proven track record of analyzing and solving complex technical problems and delivering features through a full product cycle.
Excellent written and oral communication skills, with the ability to clearly communicate technical details and concepts to engineers, architects, and stakeholders.
Experience with LLVM, Clang, or other compiler infrastructure.
Experience optimizing software performance for CPU, GPU, or high-performance computing workloads.
Experience identifying and implementing compiler performance improvements.
Experience collaborating with compiler development teams on optimization initiatives.
Experience providing technical guidance or mentoring engineers.
Demonstrated technical problem-solving through relevant engineering projects.
Written and verbal communication skills.

Job Type:

Experienced Hire

Shift:

Shift 1 (Canada)

Primary Location:

Canada, Toronto

Additional Locations:

Posting Statement:

Position of Trust

N/A

Annual Salary Range for jobs which could be performed in Canada

CAD 155,888.00-220,069.00

Salary range dependent on a number of factors including location and experience.

Work Model for this Role

Canada Accommodation:

Intel is committed to a culture of accessibility. Intel provides accommodations to applicants and employees with disabilities. Find information and request accommodation here.

Job Details:

Job Description:

The Senior Network Security Software Development Engineer will lead the architecture, development, and delivery of open-source, high-performance network security and AI reference solutions for the Network Software Enabling team in the Enterprise/Cloud Networking segment. This role works closely with architects, customers, and ecosystem partners to define technical requirements and to build reference workloads, with best known methods and configurations, optimized for Intel® Xeon® processors and accelerators across on-prem, edge, and cloud deployments.

The successful candidate will drive the design and optimization of security data planes and AI-enabled security workloads. These include Next-Generation Firewall, Secure Web Gateway, SD-WAN etc. focusing on key performance areas such as scale-up, load distribution, crypto processing, pattern matching, and the migration to AI-driven security functions. The role requires expertise in high-performance packet processing, network security functions, hardware acceleration, performance engineering, and deployment automation.

Key Responsibilities

Own the architecture and technical roadmap for one or more network security reference solutions, and keep design consistent across the portfolio.
Design and optimize packet-processing and security pipelines for throughput, latency, and TCO on current and upcoming Intel® Xeon® platforms.
Integrate hardware acceleration technologies (QAT, AVX-512/AMX, NIC offloads) into open-source security stacks such as Snort3, VPP, and Hyperscan.
Enable and optimize AI/ML models for security use cases such as malicious URL detection, phishing and fraud detection, anomaly detection, and encrypted traffic analysis, utilizing technologies such as OpenVINO™, vLLM.
Lead performance characterization, define benchmarking methods, and produce the collateral that shows customer value.
Drive Infrastructure as Code (IaC) automation for cloud and edge deployment, provisioning, and benchmarking using tools such as Terraform, Packer, and Ansible.
Evaluate emerging network security, AI, and platform technologies, and drive innovation through proofs of concept and reference implementations.
Provide technical leadership, mentor engineers, and lead design and code reviews.
Represent the team with customers, partners, and upstream open-source communities to speed up adoption of Intel-powered solutions.

Qualifications:

Minimum Qualifications

Bachelor's degree in Computer Science, Computer Engineering, Electrical Engineering, or a related technical discipline.
10+ years of experience in networking or systems software development.
Strong programming skills in C and/or C++/Rust on Linux, with Python, PowerShell or Bash for tooling.
Hands-on experience with high-performance networking technologies such as DPDK, VPP, or kernel networking/XDP.
Exposure to AI/ML technologies and concepts, such as model training and inference, neural network architectures (CNNs, transformers), and LLMs, and how they apply to network security workloads.
Excellent communication and collaboration skills, with a proven ability to lead technical work across teams.

Preferred Qualifications

Master's or PhD in Computer Science, Electrical Engineering, or a related field.
Strong background in network security: firewall, IPS/IDS, IPsec/TLS, VPN, or deep packet inspection (DPI) and pattern matching.
Experience with AI/ML training and inference optimization (including model compression) for security use cases, using frameworks such as PyTorch, TensorFlow, OpenVINO™, and vLLM.
Upstream contributions to DPDK, VPP, Linux, or related networking/security open-source projects.
Track record of profiling and tuning performance at the microarchitecture level.
Experience with containers, Kubernetes, and cloud or edge deployment automation.
Experience integrating hardware acceleration technologies (QAT, NIC offloads) and vectorized optimization of software pipelines.
Experience with Snort3, Hyperscan, or comparable IPS and pattern-matching engines.
Familiarity with CI/CD pipelines and Infrastructure as Code tools.
Experience presenting technical solutions to customers, partners, and industry forums.

Job Type:

Experienced Hire

Shift:

Shift 1 (Ireland)

Primary Location:

Ireland, Leixlip

Additional Locations:

Posting Statement:

Position of Trust

N/A

EU Salary

We offer a total compensation package that ranks among the best in the industry.

Annual Salary Range for this job which could be performed in Ireland is: ‏76,000.00 € - €142,100.00

The compensation range displayed in this posting reflects the minimum and maximum target compensation for this position. Within this range, individual pay is determined by job related skills, experience, and relevant education, training. As part of our total compensation approach, the final offer may include additional pay components and benefits. Your recruiting team will share the confirmed base salary along with any applicable total compensation elements upon employment offer delivery.

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

c9:T1d66,

Job Details:

Job Description:

The Senior Cloud Software Development Engineer will lead the architecture, development, and delivery of cloud-native, AI-enabled software platforms for the 5G Wireless Core engineering organization. This role works closely with Solution Architects, Business Development Engineers, customers, and ecosystem partners to define technical requirements and create innovative software solutions optimized for Intel® Xeon® processors, accelerators, and AI execution environments.

The successful candidate will drive the creation of scalable software platforms and AI-enabled solutions that help customers integrate, deploy, optimize, and operationalize advanced AI capabilities within cloud-native telecommunications environments. The role requires deep expertise in AI/ML model deployment and optimization, software architecture, performance engineering, cloud-native technologies, and customer-facing technical leadership.

Key Responsibilities

Architect and develop cloud-native software platforms that enable customers to integrate, deploy, and operationalize AI-powered solutions within 5G Wireless Core environments.
Lead the design and implementation of scalable distributed software services and Kubernetes-based applications that combine AI/ML technologies, large language models, and cloud-native telecommunications platforms to solve customer and business challenges.
Partner with Solution Architects, Business Development Engineers, customers, and ecosystem partners to define technical strategies and translate business requirements into innovative software solutions.
Drive technical strategy, architecture decisions, and solution direction across multiple software initiatives.
Work closely with sales, business development, and customer engineering teams to identify opportunities where AI-enabled solutions can accelerate adoption of Intel technologies.
Enable, deploy, and optimize AI/ML workloads in cloud-native environments using Intel hardware and software technologies.
Design and optimize AI inference and model-serving frameworks utilizing technologies such as OpenVINO™, vLLM, PyTorch, and TensorFlow.
Deliver high-performance software solutions utilizing Intel® Xeon® processors and accelerator technologies.
Lead customer engagements, technical workshops, proof-of-concepts, and solution demonstrations showcasing Intel-powered AI and cloud-native solutions.
Evaluate emerging AI, cloud, and telecommunications technologies and drive innovation through proof-of-concept and production deployments.
Provide technical leadership, mentorship, and guidance across cross-functional engineering teams.
Influence customer technical strategies, ecosystem partnerships, and solution architectures within the 5G and AI ecosystem.
Represent Intel in strategic engagements with customers, partners, and industry stakeholders to accelerate adoption of Intel-powered solutions.

Qualifications:

Minimum Qualifications

Bachelor's degree in Computer Science, Computer Engineering, Electrical Engineering, or related technical discipline.
10+ years of software development experience with substantial experience in large-scale distributed systems.
Strong programming expertise in C and C++.
Experience deploying, optimizing, and operationalizing AI/ML models in production environments.
Hands-on experience with AI/ML frameworks such as PyTorch, TensorFlow, OpenVINO™, vLLM, or equivalent technologies.
Expertise in AI inferencing, large language models (LLMs), generative AI, and model-serving technologies.
Experience with GPU, accelerator, and heterogeneous computing platforms.
Extensive experience designing and developing cloud-native applications and microservices architectures.
Hands-on experience with Kubernetes and container orchestration technologies.
Experience with OpenShift Container Platform (OCP) administration, deployment, and operations.
Strong understanding of Linux-based development environments.
Experience with 5G Core network architecture and cloud-native telecommunications platforms.
Experience with software architecture, system design, performance optimization, and scalability engineering.
Experience leading customer-facing technical engagements and translating business requirements into software solutions.
Excellent communication, collaboration, and stakeholder engagement skills.
Demonstrated ability to lead complex technical projects across geographically distributed teams.

Preferred Qualifications

Master's or PhD in Computer Science, Electrical Engineering, Telecommunications, Artificial Intelligence, or related field.
Experience with 3GPP-defined 5G Core network functions and cloud-native network function (CNF) architectures.
Familiarity with CI/CD pipelines, GitOps methodologies, and Infrastructure-as-Code tools.
Experience working with telecommunications operators, cloud service providers, or network equipment vendors.
Knowledge of service mesh technologies, observability platforms, and cloud-native operations.
Experience representing technical solutions to customers, partners, and industry forums.
Experience driving technical strategy across customer engagements, ecosystem partnerships, and multi-disciplinary engineering teams.
Proven track record of technical leadership and influencing architecture across large engineering organizations.

Job Type:

Experienced Hire

Shift:

Shift 1 (Ireland)

Primary Location:

Ireland, Leixlip

Additional Locations:

Posting Statement:

Position of Trust

N/A

EU Salary

We offer a total compensation package that ranks among the best in the industry.

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

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Job Details:

Job Description:

As a Facilities Mechanical Engineer, you will play a critical role in ensuring the availability, reliability, and maintenance of essential mechanical and HVAC systems that support manufacturing, clean room, and research and development activities. You will design, analyze, and troubleshoot mechanical systems to deliver innovative solutions, drive system reliability, and support operational excellence on a day-to-day basis. This role requires regular onsite presence to fulfill key responsibilities and make a tangible impact on Intel's operations and infrastructure.

Business group

Intel Corporation's Facilities Operations team is dedicated to maintaining and optimizing the mechanical infrastructure that supports Intel's global manufacturing and research efforts. The team ensures that mechanical systems operate safely, reliably, and efficiently, enabling Intel to meet its business objectives and deliver cutting-edge products to customers. Joining this group means contributing to Intel's success by providing world-class engineering solutions and supporting sustainability and innovation across facilities.

Key Responsibilities

Ensure the reliability, availability, and maintenance of mechanical and HVAC systems such as chilled water plants, boilers, environmental abatement systems, and clean room equipment.
Design, analyze, and troubleshoot mechanical systems to identify and resolve systematic issues.
Develop engineering scopes of work for mechanical projects and conduct design reviews and evaluations.
Partner with internal customers and operations teams to implement engineering solutions that support equipment and systems needs.
Conduct feasibility studies and testing on new and modified designs, and oversee prototype fabrication and design testing.
Collaborate with maintenance service providers to ensure mechanical systems are operated and maintained within specified limits.
Create mechanical systems roadmaps and asset replacement strategies to ensure reliability, redundancy, and capacity for facility expansions and renovations.
Support Intel's safety, reliability, and environmental objectives through daily tactical efforts in mechanical systems management.

Behavioral traits

Strong analytical and problem-solving skills with the ability to drive innovative solutions.
Effective communication skills to collaborate across teams and with stakeholders.
Enthusiasm for contributing to sustainability initiatives and operational excellence.

Qualifications:

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum qualifications and are considered a plus factor in identifying top candidates. This position is not eligible for Intel immigration sponsorship

Minimum Qualifications

Bachelor's degree in Mechanical Engineering, or a related field, with 10+ years of experience in designing, maintaining, and optimizing mechanical systems OR Master's degree in Mechanical Engineering with 6+ years of relevant experience OR PhD in Mechanical Engineering with 3+ years of relevant experience.
Experience mentioned above should be a combination of the following areas:
- Mechanical system design, analysis, and troubleshooting methodologies.
- Knowledge of HVAC systems or environmental compliance exhaust systems or mechanical process equipment.
- Engineering tools for system evaluation and design documentation.
- Familiarity with safety and environmental regulations related to facilities management.

Preferred Qualifications:

Prior experience working in manufacturing or clean room facilities.
Develop long-term strategies for system reliability and capacity planning.

Joining Intel's Facilities team offers an exciting opportunity to shape the foundation of a company known for innovation and excellence. Be part of an environment where your expertise drives impactful solutions and supports Intel's growth.

Job Type:

Experienced Hire

Shift:

Shift 1 (United States of America)

Primary Location:

US, Arizona, Phoenix

Additional Locations:

Posting Statement:

Position of Trust

N/A

Benefits

Annual Salary Range for jobs which could be performed in the US: $140,830.00-198,820.00 USD

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

Job Details:

Job Description:

The Cloud Software Development Engineer will contribute to the design, development, and delivery of cloud-native, AI-enabled software platforms for the 5G Wireless Core engineering organization. This role works closely with Solution Architects, Business Development Engineers, customers, and ecosystem partners to develop innovative software solutions optimized for Intel Xeon processors, accelerators, and AI execution environments.
The successful candidate will develop scalable software solutions and cloud-native platforms that enable next-generation AI capabilities within 5G Core environments. The role requires strong software engineering skills, experience with AI/ML technologies, and the ability to engage directly with customers to understand requirements, demonstrate solutions, resolve technical challenges, and support successful deployments.

Qualifications:

Key Responsibilities
• Design, develop, test, and deploy cloud-native software platforms that enable customers to integrate, deploy, and operationalize AI-powered solutions within 5G Wireless Core environments.
• Develop scalable distributed software services and Kubernetes-based applications that combine AI/ML technologies, large language models, and cloud-native telecommunications platforms to deliver innovative customer-focused solutions.
• Collaborate with Solution Architects, Business Development Engineers, customers, and ecosystem partners to translate business and technical requirements into software solutions.
• Work closely with sales, business development, and technical customer-facing teams to understand customer challenges and develop solutions that accelerate adoption of Intel technologies.
• Support customer engagements, technical workshops, proof-of-concepts, and solution demonstrations showcasing Intel-powered platforms and AI capabilities.
• Enable, deploy, and optimize AI/ML workloads in cloud-native environments.
• Develop and optimize AI inference and model-serving solutions utilizing technologies such as OpenVINO, vLLM, PyTorch, and TensorFlow.
• Optimize software solutions for Intel Xeon processors and accelerator technologies.
• Contribute to software architecture, feature definition, and technical roadmaps.
• Evaluate emerging AI, cloud, and telecommunications technologies and contribute to proof-of-concept and production deployments.
• Collaborate across geographically distributed engineering teams to deliver high-quality software and customer-focused solutions.
• Participate in technical discussions with customers and ecosystem partners to identify opportunities for innovation and solution optimization.

Minimum Qualifications
• Bachelor's degree in Computer Science, Computer Engineering, Electrical Engineering, or a related technical discipline.
• 7+ years of software development experience with experience in distributed systems and cloud-native software development.
• Strong programming experience in C and/or C++ and python
• Experience deploying, optimizing, and operationalizing AI/ML models in production environments.
• Hands-on experience with AI/ML frameworks such as PyTorch, TensorFlow, OpenVINO, vLLM, or equivalent technologies.
• Experience with AI inferencing, large language models (LLMs), generative AI, and model-serving technologies.
• Experience with GPU, accelerator, and heterogeneous computing platforms.
• Experience designing and developing cloud-native applications and microservices architectures.
• Hands-on experience with Kubernetes and container orchestration technologies.
• Experience with OpenShift Container Platform (OCP) administration, deployment, and operations.
• Strong understanding of Linux-based development environments.
• Experience with 5G Core network architecture and cloud-native telecommunications platforms.
• Experience with software design, performance optimization, debugging, and scalability engineering.
• Experience working directly with customers, field teams, Solution Architects, or Business Development teams to troubleshoot, optimize, and demonstrate software solutions.
• Strong communication, collaboration, and stakeholder engagement skills.

Preferred Qualifications
Master's degree in Computer Science, Electrical Engineering, Telecommunications, Artificial Intelligence, or a related field.
Experience with 3GPP-defined 5G Core network functions and cloud-native network function (CNF) architectures.
Familiarity with CI/CD pipelines, GitOps methodologies, and Infrastructure-as-Code tools.
Experience working with telecommunications operators, cloud service providers, or network equipment vendors.
Knowledge of service mesh technologies, observability platforms, and cloud-native operations.
Experience supporting customer deployments, proof-of-concepts, and technical solution demonstrations.
Experience contributing to software architecture and technical direction for complex engineering projects.
Demonstrated ability to work effectively across engineering, product, sales, and customer-facing organizations.

Job Type:

Experienced Hire

Shift:

Shift 1 (Ireland)

Primary Location:

Ireland, Leixlip

Additional Locations:

Posting Statement:

Position of Trust

N/A

EU Salary

We offer a total compensation package that ranks among the best in the industry.

Annual Salary Range for this job which could be performed in Ireland is: ‏63,600.00 € - €118,800.00

The compensation range displayed in this posting reflects the minimum and maximum target compensation for this position. Within this range, individual pay is determined by job related skills, experience, and relevant education, training. As part of our total compensation approach, the final offer may include additional pay components and benefits. Your recruiting team will share the confirmed base salary along with any applicable total compensation elements upon employment offer delivery.

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

cc:T212d,

Job Details:

Job Description:

Intel is one of the world's leading semiconductor companies, driving innovation across computing, connectivity, and manufacturing. With a legacy of technological excellence and a bold vision for the future, Intel is committed to pushing the boundaries of what's possible — from the chip to the cloud. Our Advanced Packaging Technology Development – Substrate and Wafer Assembly (ATPD: SWA) organization is at the forefront of delivering innovative, cost-effective packaging solutions that power the next generation of technology. At Intel, we believe in investing in our people, fostering a culture of continuous learning, and empowering every team member to make a meaningful impact.

We are looking for a skilled and motivated Manufacturing Equipment Technician to join our ATPD: SWA team in Arizona. In this role, you will be responsible for maintaining, troubleshooting, and optimizing advanced electromechanical equipment that is critical to Intel's semiconductor manufacturing operations. Your work will directly contribute to Intel's manufacturing innovation, production efficiency, and global competitiveness. This is an exciting opportunity to work with cutting-edge technology in a world-class cleanroom environment while growing your technical career at one of the most recognized names in the semiconductor industry.

Shift Information

This role operates on Shift 7: 6:00 AM – 6:18 PM on an alternating weekly schedule:

Alternating 3-Day (Thu/Fri/Sat) and 4-Day (Wed/Thu/Fri/Sat) work weeks

Key Responsibilities:

Troubleshoot and resolve electrical and mechanical issues across a range of advanced manufacturing equipment.
Perform equipment setup, calibration, and both corrective and preventive maintenance, with a focus on wet chemistry, plating, and dry high-vacuum toolsets.
Analyze tool performance data to proactively identify and address reliability issues, ensuring minimal production downtime.
Collaborate closely with engineering and cross-functional support teams to enhance equipment functionality and streamline manufacturing processes.
Accurately document maintenance activities, repair findings, and parts usage in accordance with established systems and protocols.
Lead or actively support continuous improvement projects, including root cause analysis and equipment optimization initiatives.
Operate safely and effectively within a cleanroom environment, adhering to all cleanroom attire requirements and safety protocols.

As a Successful Candidate, You Will Bring:

Strong communicator — You express ideas clearly and confidently, both verbally and in writing, and can work effectively with peers and engineering teams.
Collaborative mindset — You thrive in team environments and build strong working relationships across functions.
Problem-solving orientation — You approach challenges with curiosity and persistence, always looking for the root cause.
Attention to detail — You take pride in accuracy, whether documenting maintenance records or calibrating sensitive equipment.
Adaptability — You are comfortable working in a dynamic, fast-paced manufacturing environment and embrace change.
Continuous improvement mindset — You are proactive in identifying opportunities to improve processes and equipment performance.
Accountability — You take ownership of your work and follow through on commitments.

Are you ready to be part of a team that is shaping the future of semiconductor manufacturing? At Intel in Arizona, you'll have the opportunity to work on some of the most advanced manufacturing technologies in the world, grow your skills, and make a real impact every day.

Qualifications:

Minimum Qualifications:

Candidates must meet at least one of the following:

Bachelor's degree in a STEM field OR
Associate degree in a technical field with 2+ years of preventive and corrective equipment maintenance experience OR
High School Diploma/GED with:
- 2.5+ years of preventive and corrective Equipment Maintenance Experience
- or 3+ years of Technical Experience
- or 4+ years of Field Service Engineer-level semiconductor maintenance experience or Military Technical Experience.

This role also requires the ability to:

Lift 25-pound parts 1–2 times per-shift
Climb and work on ladders 1–3 times per-shift
Stand and walk for up to 80% of the workday

Preferred Qualifications:

5+ years of experience:
Troubleshooting, installing, repairing, and operating electromechanical equipment in semiconductor manufacturing
Wet chemistry, plating, and dry high-vacuum equipment
Using electrical/mechanical measuring devices (multimeters, oscilloscopes, calipers, micrometers)
Read and interpret complex electrical schematics and mechanical drawings
Hand tools such as torque wrenches for equipment repair

Job Type:

Experienced Hire

Shift:

Shift 7 (United States of America)

Primary Location:

US, Arizona, Phoenix

Additional Locations:

Posting Statement:

Position of Trust

N/A

Benefits

Annual Salary Range for jobs which could be performed in the US: $60,450.00-116,640.00 USD (Hourly Role)

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

Job Details:

Job Description:

Robotics presents a significant business opportunity for Intel. Within our Robotics business segment, we are seeking an experienced Senior Solution Manager to manage the robotics solution roadmap and drive the strategy, business plan, partner and customer development for especially humanoid robotics, and delivery of the growth projections inclusive of the product, software, models, systems and enablement plans. This Manager brings the business and technology acumen, and the breadth and depth of robotics expertise in Humanoid Robotics, to make sound solutions/product/platform decisions and sustain momentum with customers and partners. Elements include: • Own and drive the solution roadmap for robotics segment especially for Humanoid Robotics across components, platforms, and enablement, aligning it to business goals and growth projections. • Serve as the primary point of contact for key robotics ecosystem partners/customers - identifying value creation opportunities, leading technical alignment sessions, and business reviews to sustain relationships and continuity. • Identify, prioritize, and close design opportunities, working with customers from evaluation through commitment to protect and grow the pipeline. • Develop and manage partner and ecosystem relationships that expand the segment's reach and accelerate adoption. • Translate market and customer requirements into clear solution/product definitions, priorities, and enablement plans in partnership with cross-functional teams. • Assess market data and competitive dynamics on an ongoing basis to inform roadmap trade-offs and identify value-creation opportunities. • Build product value cases and business justifications to inform and influence internal and external stakeholders in making effective decisions. • Drive cross-functional execution across BUs, RnD engineering, sales and marketing, and partner teams - setting clear goals, maintaining accountability, and keeping initiatives on track to committed timelines. • Track and report on solutions and business performance, deriving areas of continuous improvement and course-correcting as needed.

Qualifications:

Qualifications: • BS or MS in Robotics, Computer Science, Electrical/Mechanical Engineering or related field. MBA preferred. • Minimum 8 years of industry experience in robotics (Humanoids, Articulated robots, or mobile robots), or a related role. Familiarity with China humanoid robotics ecosystem. Product / Solution management experience in China humanoids robotics company is a strong plus. • Demonstrated experience owning a robotics product definition/design/development/validation/deployment and driving customer/partner engagements. • Proven ability to develop complex technical and business strategies and have the ability to solve technical/business problems with limited direction. • Able to work closely with engineering experts from all fields to create strategic product architecture and detailed specification. • Excellent presentation and writing skills with experience in speaking at industry events and with customers • Excellent written, verbal and presentation skills with experience in writing MRDs/PRDs (Market/Product Requirement Document), marketing collaterals, responding to RFI/RFQs, new product introduction, competitive analysis and product positioning.

Job Type:

Experienced Hire

Shift:

Shift 1 (China)

Primary Location:

PRC, Shanghai

Additional Locations:

PRC, Beijing, PRC, Shenzhen

Posting Statement:

Position of Trust

N/A

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

Job Details:

Job Description:

We are seeking an experienced Senior Robotics Solution Architect to define and develop end-to-end technical solutions for humanoid robotics. This role combines deep robotics domain expertise, hands-on engineering experience, and strong system architecture capabilities to translate customer requirements into scalable, deployable solutions leveraging Intel technologies. The successful candidate will work closely with robotics OEMs, ecosystem partners, and internal solutions and engineering teams to address architectural challenges across compute, AI, perception, planning, control, and software infrastructure. The emphasis is on technical leadership, system integration, and engineering execution-from architecture definition and prototyping through validation and deployment. Key Responsibilities Lead end-to-end solution architecture for humanoid robotics, defining hardware and software partitioning, subsystem interfaces, compute topology, and deployment requirements. Translate robot-level requirements into detailed technical specifications, balancing performance, real-time responsiveness, power consumption, thermal constraints, reliability, and cost. Architect heterogeneous computing solutions across CPUs, GPUs, and AI accelerators, allocating workloads for perception, sensor fusion, localization, motion planning, and control. Define software architectures integrating robotics middleware, AI inference runtimes, real-time control frameworks, and development and debugging tools. Collaborate with robotics engineering teams to integrate embodied AI models and learning-based policies with robot software and control systems, addressing inference latency, resource constraints, and deployment readiness. Lead technical engagements with customers and partners, including architecture workshops, technical assessments, proof-of-concept development, integration reviews, and system-level troubleshooting. Establish benchmarking and validation methodologies covering end-to-end latency, throughput, timing determinism, power efficiency, and sustained operation under representative workloads. Develop reference architectures, technical documentation, and reusable integration guidance to accelerate engineering implementation. Work across silicon, platform, software, and robotics engineering teams to resolve architectural gaps and translate field requirements into actionable roadmap recommendations.

Qualifications:

BS or MS in Robotics, Computer Science, Electrical Engineering, Mechanical Engineering, Control Engineering, or a related technical discipline. Minimum 8 years of industry experience in robotics (Humanoids, Articulated robots, or mobile robots), or a related role. Familiarity with China robotics ecosystem. Strong understanding of robotics system architecture and the interactions among sensing, perception, planning, control, actuation, and computing infrastructure. Experience with heterogeneous computing, AI inference deployment, and hardware-software optimization in resource-constrained systems is a strong plus. Excellent written, verbal and presentation skills with experience in writing MRDs/PRDs (Market/Product Requirement Document), marketing collaterals, responding to RFI/RFQs, new product introduction, competitive analysis and product positioning. Experience supporting customers/partners in technical engagements. Strong time-management and organization skills for coordinating multiple initiatives, priorities and implementations of new technology and products into very complex projects. Strong analytical and problem-solving skills.

Job Type:

Experienced Hire

Shift:

Shift 1 (China)

Primary Location:

PRC, Shanghai

Additional Locations:

PRC, Shenzhen

Posting Statement:

Position of Trust

N/A

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

Job Details:

Job Description:

We are seeking an experienced Senior Robotics Solution Architect to define and develop end-to-end technical solutions for quadruped robotics. This role combines deep robotics domain expertise, hands-on engineering experience, and strong system architecture capabilities to translate customer requirements into scalable, deployable solutions leveraging Intel technologies. The successful candidate will work closely with robotics OEMs, ecosystem partners, and internal solutions and engineering teams to address architectural challenges across compute, AI, perception, planning, control, and software infrastructure. The emphasis is on technical leadership, system integration, and engineering execution-from architecture definition and prototyping through validation and deployment. Key Responsibilities Lead end-to-end solution architecture for especially quadruped robotics, defining hardware and software partitioning, subsystem interfaces, compute topology, and deployment requirements. Translate robot-level requirements into detailed technical specifications, balancing performance, real-time responsiveness, power consumption, thermal constraints, reliability, and cost. Architect heterogeneous computing solutions across CPUs, GPUs, and AI accelerators, allocating workloads for perception, sensor fusion, localization, motion planning, and control. Define software architectures integrating robotics middleware, AI inference runtimes, real-time control frameworks, and development and debugging tools. Collaborate with robotics engineering teams to integrate embodied AI models and learning-based policies with robot software and control systems, addressing inference latency, resource constraints, and deployment readiness. Lead technical engagements with customers and partners, including architecture workshops, technical assessments, proof-of-concept development, integration reviews, and system-level troubleshooting. Establish benchmarking and validation methodologies covering end-to-end latency, throughput, timing determinism, power efficiency, and sustained operation under representative workloads. Develop reference architectures, technical documentation, and reusable integration guidance to accelerate engineering implementation. Work across silicon, platform, software, and robotics engineering teams to resolve architectural gaps and translate field requirements into actionable roadmap recommendations.

Qualifications:

Qualifications BS or MS in Robotics, Computer Science, Electrical Engineering, Mechanical Engineering, Control Engineering, or a related technical discipline. Minimum 5 years of industry experience in robotics (Humanoids, Articulated robots, or mobile robots), or a related role. Familiarity with China robotics ecosystem. Strong understanding of robotics system architecture and the interactions among sensing, perception, planning, control, actuation, and computing infrastructure. Experience with heterogeneous computing, AI inference deployment, and hardware-software optimization in resource-constrained systems is a strong plus. Excellent written, verbal and presentation skills with experience in writing MRDs/PRDs (Market/Product Requirement Document), marketing collaterals, responding to RFI/RFQs, new product introduction, competitive analysis and product positioning. Experience supporting customers/partners in technical engagements. Strong time-management and organization skills for coordinating multiple initiatives, priorities and implementations of new technology and products into very complex projects. Strong analytical and problem-solving skills.

Job Type:

Experienced Hire

Shift:

Shift 1 (China)

Primary Location:

PRC, Shanghai

Additional Locations:

PRC, Shenzhen

Posting Statement:

Position of Trust

N/A

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

Job Details:

Job Description:

Project Cost Engineer position will oversee and support construction projects' cost controls functions in Intel Lachish Campus including cost engineering charter on all Base build and Progressive Build capital programs

Job Responsibilities

Lead overall project cost management in partnership with project teams, ensuring alignment across engineering, construction, procurement, scheduling, and finance to deliver projects at the optimal cost to Intel.
Manage construction cost reporting and total project forecast accuracy throughout design and construction phases.
Manage commits, spend, expense/OCOs forecasting, including POR, LRP, and ad hoc business forecasts.
Own monthly and quarterly project financial close deliverables.
Manage project commit execution.
Lead the CPA funding process to ensure adequate project funding for execution.
Oversee cost change control, risk management, and construction scope governance.
Establish project cost control plans and contractual requirements for assigned projects.
Oversee third-party support across cost engineering and forecasting functions.
Partner with ECM and third-party QS firms to validate commits and support cost reasonableness and forecast accuracy.
Maintain project cost tracking at the Intel WBS/IUWBS level.
Ensure financial data accuracy through schedule integrity and strong project controls foundations, including contracts, design, BIM, and supporting data.

Qualifications:

Education: Bachelor's degree in Construction Management, Engineering, Finance, Quantity Surveying, Management , or other related fields of study.
Experience: 2 to 3+ years of experience in cost engineering, construction estimating, project management, design engineering, or other related fields.

Qualifications:

Knowledge and experience of Construction project from initial what if stage to project close out.
Strong analytical skills: Ability to analyze complex construction cost data, identify trends, evaluate risks and opportunities, validate estimates, and translate large volumes of technical and financial information into actionable insights that support accurate forecasting, cost control, and informed project decision-making.
Excellent communication skills: Ability to clearly communicate complex cost, schedule, and technical information to diverse stakeholders, influence decision-making through concise insights, and foster effective collaboration across project, engineering, construction, and leadership teams. Ability to support dynamic environment that construction projects are normally operated.
Leadership and Stakeholder management skill to work with both Internal and external stakeholders including suppliers, internal customer/factory.
Business Acumen: Ability to understand the broader business, operational, and financial impacts of project decisions, balancing cost, schedule, risk, and strategic objectives to optimize value for Intel while enabling successful project execution and enterprise outcomes.
Excellent English written and verbal skills are required
Location: Intel Kiryat Gat. Project Management Building (LC24). Site presence of 4 days a week is required

Job Type:

Experienced Hire

Shift:

Shift 1 (Israel)

Primary Location:

Israel, Kiryat-Gat

Additional Locations:

Posting Statement:

Position of Trust

N/A

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

d1:T12ce,

Job Details:

Job Description:

Step into the world of advanced semiconductor manufacturing and help shape the future of technology. At Intel Ireland, we're not just building semiconductor chips, we're building the future.

As a Module Engineering Intern, you'll join a team of passionate engineers working on Intel's most advanced process technologies. You'll gain hands-on experience in a high-tech, fast-paced environment where innovation, collaboration, and continuous learning are at the heart of everything we do.

This internship is your opportunity to apply your STEM education in a real-world setting, working alongside experienced engineers to solve complex problems, optimize manufacturing processes, and contribute to the development of world-changing technology.

Responsibilities / What You'll Do

Responsible for safety, quality, operational performance, and improving productivity in addition to cost reduction for their module.
Ownership and qualification of process modules and/or equipment, including Preventative Maintenance, Root Cause analysis, Monitoring Process Performance, and Defect Reduction
Collaborate with cross-functional teams to solve technical challenges using structured, model-based problem-solving techniques.
Contribute to sustaining and improving Intel's Virtual Factory standards and process matching across global sites.
Engage in continuous learning and development through mentorship and training.

Qualifications:

Minimum Requirements:

Currently pursuing a Level 8 or Level 9 qualification in a relevant STEM discipline (e.g. Physics, Applied Chemistry, Chemical Engineering, Electronic Engineering, Mechanical Engineering, etc.).
Strong analytical and problem-solving skills.
Excellent communication skills - both written and verbal.
Ability to work independently and as part of a diverse, high-performing team.
Willingness to work in a cleanroom environment.
Strong attention to detail and disciplined approach to procedures.

Preferred Experience:

Experience with data analysis tools and software (e.g. JMP, Python, Excel).
Ability to summarize data for technical and non-technical audiences.

What We Offer

A dynamic, inclusive, and innovative work environment.
Hands-on experience with cutting-edge semiconductor technology.
Mentorship from experienced engineers and opportunities to grow your technical and professional skills.
Exposure to Intel's global manufacturing operations and Virtual Factory model.
The chance to contribute to meaningful projects that impact the lives of every person on the planet.

You must also be available for six+ months in 2027 with a preferred starting date between January and June 2027.

Job Type:

Student / Intern

Shift:

Shift 1 (Ireland)

Primary Location:

Ireland, Leixlip

Additional Locations:

Posting Statement:

Position of Trust

N/A

EU Salary

We offer a total compensation package that ranks among the best in the industry.

The minimum Annual Salary for this job which could be performed in Ireland is: €31,400.00

The job posting reflects the minimum base compensation for this role. Our standard internship rates are aligned with the specific job role and degree level. As part of our total compensation approach, the final offer may also include additional pay components and benefits. Your recruiting team will provide the confirmed base salary along with any applicable total compensation elements upon employment offer delivery.

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

d2:T11d8,

Job Details:

Job Description:

The Role and Impact
Join our dynamic team in driving innovation at Intel, where you will contribute to the design, development, and validation of next-generation System-on-a-Chip (SoC) technologies. In this role, you will play a key part in shaping cutting-edge solutions that enhance user experiences across Intel's Client systems. Day-to-day, your work will involve a mix of hands-on technical design and verification tasks, ensuring the functionality, performance, and integration of SoC components.

Business group
Intel Corporation is at the forefront of developing technologies that power millions of devices worldwide. As part of the SPE ISCP SFD Domain23 team, you will join an organization dedicated to advancing SoC IP development and integration for Intel's latest products. This group plays a vital role in pushing the boundaries of innovation, collaborating across teams to deliver high-quality solutions that support Intel's leadership in technology.

Key Responsibilities

Contribute to the design, development, and verification of Intel proprietary SoC IPs.
Utilize hardware description languages such as Verilog or SystemVerilog to integrate and validate IPs within broader SoC architectures.
Collaborate with architects and cross-functional teams to ensure seamless IP interoperability and adherence to design requirements.
Develop and execute test plans, simulations, and coverage analysis to validate functionality.
Support debugging efforts to address pre-silicon validation and technical readiness challenges.
Create and maintain technical documentation, including design specifications and test plans.
Develop scripts and tools using programming languages like Python or Perl to automate workflows and enhance efficiency.
Contribute to process improvements in SoC development methodologies.

Qualifications:

Minimum Qualifications

A Bachelor's degree in Electrical Engineering, Electronics Engineering, Computer Engineering, Computer Science, or a related field.
Proficiency in hardware description languages (HDLs) such as Verilog or SystemVerilog.
Knowledge of digital design principles, simulation, and verification methodologies.
Experience with programming or scripting languages, including Python, Perl, or Shell scripting.
Familiarity with EDA tools such as ModelSim or Synopsys VCS and industry-standard protocols.

Preferred Qualifications

Strong analytical and problem-solving skills.
Excellent communication and teamwork abilities.
A passion for innovation and eagerness to learn in a fast-paced environment.

We invite you to be part of the team that shapes the future of computing. Join us in advancing groundbreaking technologies and take your career to new heights by applying today.

Job Type:

Intel Contract Employee

Shift:

Shift 1 (Malaysia)

Primary Location:

Malaysia, Penang

Additional Locations:

Posting Statement:

Position of Trust

N/A

Work Model for this Role

Job Details:

Job Description:

Join us to help build the next generation of AI hardware solutions. You will be part of a team developing cutting-edge HW for the AI domain, where we push the boundaries of what silicon can do for emerging AI workloads.

We are continuously developing modern and effective working methods, including hands-on adoption of AI tools throughout the chip development flow. The environment is fast-paced and intellectually stimulating.

Your Mission: Integrate hardware security IP into the SoC/die and define the HW security architecture protecting a large-scale data center's compute, network, and control infrastructure.

Responsibilities:

Integrate third-party and internal HW security IP (Root of Trust, crypto engines, HSMs, TRNG, key vaults) into the die; write and own the RTL/integration code wiring these units into the SoC.
Author RTL for security units, glue logic, fuse/OTP interfaces, and bus/fabric (AXI/AHB/NoC) connections; manage clock/reset/power domains and CDC.
Develop integration test benches, run lint/CDC/synthesis-readiness checks, and support DV/verification of the embedded security IP.
Architect platform Root of Trust, secure boot, attestation, and confidential computing (TDX/SGX/SEV-equivalent) across the server fleet.
Threat-model the full stack (silicon, firmware, BMC, supply chain) and define HW mitigations against physical and side-channel attacks.
Drive secure key management, debug-lockdown, fuse provisioning, and crypto offload for tenant isolation at scale.
Collaborate closely with architecture, design verification, physical design, firmware, and platform teams throughout the development cycle.

Qualifications:

B.Sc., M.Sc., or Ph.D. in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
5+ years of experience in RTL development, SoC design, or hardware security integration.
Proficient in Verilog/SystemVerilog RTL, IP integration, bus protocols (AXI/AHB/NoC); lint, CDC, synthesis, DV flows.
Expertise in roots of trust, TEEs, secure boot/firmware, crypto IP, side-channel mitigations.
Plus: fuse/OTP provisioning, supply-chain security, multi-tenant cloud isolation.

Job Type:

Experienced Hire

Shift:

Shift 1 (Israel)

Primary Location:

Israel, Haifa

Additional Locations:

Israel, Petah-Tikva

Posting Statement:

Position of Trust

N/A

Work Model for this Role

d4:T13c8,

Job Details:

Job Description:

The Role and Impact
Step into the forefront of innovation as part of a team dedicated to advancing next-generation System-on-a-Chip (SoC) technologies that shape the future of computing. In this role, you will contribute to the design, development, and verification of cutting-edge SoC solutions, ensuring exceptional user experiences in Intel's latest client products. Your hands-on work will directly impact high-quality delivery and functionality, driving Intel's market-leading technologies.

Business Group
Join Intel Corporation's dynamic System-on-a-Chip (SoC) development group, a global leader in creating advanced proprietary IPs critical to Intel's latest high-performance computing products. This team focuses on defining, integrating, and validating cutting-edge technologies to power millions of devices worldwide. With a culture of collaboration and innovation, the group plays a pivotal role in Intel's mission to deliver world-class solutions and push the boundaries of technology.

Key Responsibilities

Develop pre-silicon functional validation strategies, test plans, and methodologies for advanced SoC/chipset designs.
Collaborate with architects, micro-architects, and various design teams on technical readiness and validation approaches.
Design and execute simulations to verify functionality and performance of integrated IPs in SoC systems.
Debug complex issues at the IP and SoC levels to ensure timely delivery of high-quality systems.
Assist in streamlining verification flows by implementing automation tools and techniques.
Create and maintain technical documentation such as design specifications and test plans.
Drive innovation by contributing to the improvement of methodologies and processes for validation efficiency.

Qualifications:

Minimum Qualifications

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or relevant fields with 0-1 years of hands-on experience gained through internships, academic projects, coursework, or training. OR
Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related fields with no prior professional experience.
Proficiency in hardware description languages (HDLs) like Verilog or VHDL.
Fundamental understanding of digital design principles, simulation, and verification methodologies.
Experience with programming/scripting languages such as Python or Shell scripting.
Familiarity with industry-standard EDA tools like ModelSim or Synopsys VCS.

Preferred Qualifications

Strong analytical and problem-solving skills with a passion for solving technical challenges.

Knowledge of computer architecture or related subsystems.

Exposure to FPGA/emulation debug or low-level system debugging.

Excellent teamwork and communication skills to thrive in a collaborative, fast-paced environment.

Eagerness to learn, adapt, and contribute to innovative technologies.

We are excited to welcome motivated and curious talents eager to drive cutting-edge solutions and make a meaningful impact. Take this opportunity to join Intel's vibrant community of innovators and start shaping the future of global technology advancements.

Job Type:

Intel Contract Employee

Shift:

Shift 1 (Malaysia)

Primary Location:

Malaysia, Penang

Additional Locations:

Posting Statement:

Position of Trust

N/A

Work Model for this Role

Job Details:

Job Description:

Position Overview We are seeking a Supply Chain Engineer (SCE) working in Global Operations (GO) - Backend Equipment and Materials (BEM) department to support direct materials management in the semiconductor assembly and test environment, with a primary focus on incoming materials technical readiness and quality. The role interfaces with module engineering, manufacturing, and quality teams to ensure materials meet specifications, reliability requirements, and production needs. The candidate will drive materials issue resolution, materials qualification, and continuous improvement to enable predictable and efficient manufacturing operations. Key Responsibilities - Incoming Direct Materials Technical Ownership : Ensure incoming direct materials, including substrates and assembly materials, meet defined technical specifications and quality requirements. Work closely with Supplier Materials Engineering (SME), Materials Quality and Reliability Engineering (MQRE), and factory Module Engineering (ME) teams to validate material readiness, support new materials / products introduction, and enable smooth transition to high volume manufacturing (HVM). - Direct Materials Quality Management : Lead direct materials quality excursion. Partner with SME and MQRE teams to manage material excursions, including containment, risk assessment, root cause analysis, and disposition decisions. Drive corrective and preventive actions (CAPA), support reliability validation and data analysis, and lead quality, yield improvement, and cost optimization initiatives to ensure sustained material performance and long-term product reliability. - Supplier Qualification and Change Management : Support supplier qualification, validation, and engineering changes to support supplier capex activities, quality/yield continously improvement as well as cost savings / optimization activities. Participate in Materials Change Control team to ensure controlled and risk-managed implementation. - Audit Support : Prepare for and participate in supplier audits, customer audits, internal audits, and ISO 9001 / IATF 16949 audits. Support audit readiness, documentation, and closure of findings to ensure compliance with quality management systems and regulatory requirements.

Qualifications:

Qualifications - Education and Experience : Bachelor's or Master's degree in Materials Science, Engineering, or a related field, with a minimum of six years of experience in semiconductor or manufacturing environments. Experience in backend assembly, packaging, or high-volume production is preferred. - Technical Competencies : Strong understanding of material properties, including thermal and mechanical behavior, as well as failure analysis and package reliability concepts. Good knowledge of manufacturing processes and material interactions with equipment. - Quality Systems and Standards : Working knowledge of ISO 9001 and familiarity with IATF 16949 requirements. Experience with structured problem-solving methodologies such as 8D and supporting audits, and continuous improvement activities. - Analytical and Problem-Solving Skills : Strong data analytical skills. Experience in statistical analysis and design of experiments (DOE), with proficiency in tools such as JMP / SPSS or equivalent. Experience in building dashboard. - Systems and Tools : Familiarity with ERP systems (e.g., SAP) and materials management tools for tracking, traceability, and issue management. - Communication and Collaboration : Effective communication skills with the ability to work across cross-functional teams and align stakeholders on technical and operational matters.

Job Type:

Experienced Hire

Shift:

Shift 1 (Vietnam)

Primary Location:

Vietnam, Ho_Chi_Minh_City

Additional Locations:

Posting Statement:

Position of Trust

N/A

Work Model for this Role

Privacy Statement:

Your privacy matters to Intel and we comply with applicable data protection laws. We collect and maintain personal information for recruitment related activities and your data will not be used for any other purpose. We retain personal information for the periods and purposes set forth in Intel Privacy Notice. Retention periods can vary significantly based on the type of information and how it is used. We do not share your personal information with third parties.

In order for Intel to communicate with you on your application results, by submitting your information and proceeding with this application, you agree and consent that we can collect your personal information. You will have the ability to opt-out by informing vietnamjobs@intel.com or at any time selecting unsubscribe found at the bottom of our future marketing communications. You have rights to correct, update, request access to or deletion of your personal information as described in Intel Privacy Notice. In addition, if you wish to update or otherwise make changes to your resume, use Intel online application tool to resubmit a new resume.

Job Details:

Job Description:

As a Supply Chain Technical Analyst, you will play a pivotal role in shaping Intel’s supply chain efficiency and reliability. Your contributions will directly impact the company’s ability to meet customer demands while optimizing time, cost, and resources.

By leveraging data-driven insights and collaborating across teams, you will help develop innovative supply chain solutions that support Intel’s product and future foundry partnership.

This is your opportunity to drive meaningful results in a dynamic, fast-paced environment while working with cutting-edge technologies and processes.

This is an Intel contract position (1 year).

Key responsibilities

Develop, optimize, and execute supply chain planning schedules, materials forecasts, and build plans to meet customer requirements.
Analyze data and apply mathematics, statistics, and advanced analytics to identify patterns and optimize inventory, material flow, network efficiency, and cost effectiveness.
Create and maintain supply chain strategies that align with business objectives, leveraging optimization models and data-driven insights.
Develop and maintain data structures, dashboards, and standardized reports to support supply chain operations and decision-making.
Proactively manage supply disruptions, clearly communicating adjustments to build plans.
Create and process PRs and POs in SAP.
Reconcile plans/differences in Purchase Order Systems and Forecasting Systems.
Review purchasing requests for accuracy and completeness and ensure alignment with plans.
Ensure data accuracy, compliance, and timely transaction processing.

Qualifications:

Minimum Qualifications, you must possess the minimum qualifications below to be initially considered for this position.

Bachelor's degree in Supply Chain Management, Business, Data Analytics, Industrial Engineering, or a related field.
3+ years equivalent experience in data analysis and visualization tools such as Excel, Power BI, or similar.

This position is not eligible for Intel immigration sponsorship.

Preferred Qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Familiarity with supply chain modeling, optimization tools, or statistical software.
Experience working in cross-functional teams and collaborating across various departments.
Strong problem-solving, organizational, attention to detail and communication skills.
SAP ECC as it relates to Purchase Requisition and Purchase Order processing.
Working knowledge of Microsoft Office suite/365 with a deep understanding and application of Excel, Data Management/Analytics, Power BI
Experience building and presenting dashboards/charts/graphs.

Job Type:

Intel Contract Employee

Shift:

Shift 1 (United States of America)

Primary Location:

US, Oregon, Hillsboro

Additional Locations:

Posting Statement:

Position of Trust

N/A

Benefits

Annual Salary Range for jobs which could be performed in the US: $52,000.00-$200,000.00

Work Model for this Role

Job Details:

Job Description:

As a SoC Power Thermal Performance Validation and Optimization Engineer, you will play an essential role in ensuring Intel's products achieve optimal power, thermal, and performance benchmarks at the system-on-chip (SoC) level.

In this position, you will develop and execute validation methodologies, optimize hardware/software solutions, and perform SoC-level debugging to address power, thermal, and performance challenges. Your contribution will directly impact Intel's ability to deliver competitive, high-performing products to market.

This is a Temporary position (12 months)

Key Responsibilities

Develop and execute System-on-Chip (SoC)-level Core-to-Memory performance and Input/Output (I/O) to memory, Compute Express Link (CXL), Accelerators, and Concurrency validation and optimization plans across Intel products.
Collaborate with architecture, design, firmware, and software teams to ensure Core-to-Memory, Input/Output (I/O), and performance meet competitive targets and specifications.
Establish and execute Core-to-Memory (bandwidth, latency, workloads, benchmarks, tunings - prefetcher, Memory Controller, Core Building Block) and Input/Output to memory, Compute Express Link (CXL), Accelerators (Data Streaming Accelerator and In-Memory Analytics Accelerator), and Concurrency methodologies for validating hardware/software optimizations and ensure alignment with business Key Performance Indicators (KPIs).
Perform System-on-Chip (SoC)-level debug to identify root causes and resolve functional and triage failures related to Core-to-Memory performance and the Input/Output (I/O) domain.
Configure and set up performance monitors/tools and data loggers to collect and analyze Core-to-Memory and Input/Output transactions/data.
Develop and maintain validation infrastructure, including Core-to-Memory and Input/Output performance monitors, behavioral checkers, and testing environments.
Produce comprehensive validation reports summarizing activities and results and communicates findings effectively with relevant teams.
Drive continuous improvements to validation strategies, methodologies, and processes.

The ideal candidate should show the following behavioral traits

Strong analytical and problem-solving aptitude.
Effective communication and documentation skills for cross-functional collaboration.
Advanced teamwork skills to work across team in multi-faceted groups (architecture, design, verification, firmware, software, and platform teams).

Qualifications:

Minimum qualifications, you must possess the below minimum qualifications to be initially considered for this position.

Bachelors in Electronics, Electrical, Computer Engineering, or related field.
1+ years of experience in core-to-memory (or similar performance validation area) and/or I/O (PCIe, CLX, Accelerators) validation.
1+ years of experience developing and / or optimization of core-to-memory and I/O power/performance KPI's.
Intermediate to advanced English level.

Must have unrestricted, permanent right to work in Mexico (this role is not eligible for visa or immigration sponsorship).

Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

A Master's degree is preferred.
Debugging experience for SoC-level power, thermal, and performance failures.
Knowledge of hardware/software optimizations for performance workloads, benchmarks, and I/O validation.
Experience with System (SoC) level debug using JTAG debuggers.
Familiarity with validation tools such as performance monitors/counters, data acquisition/loggers, behavioral checkers, and state space coverage techniques.
Familiar with system board design/debugging and usage of lab equipment like Oscilloscope and Logic analyzer.
Experience with core-to-memory and I/O performance modeling, benchmarking, and validation infrastructure setup.
Experience with Python Programming language.

Requirements may be met through a combination of relevant industry experience, internship experience, and/or academic work, coursework, or research.

Candidates who have completed their degree and whose professional experience is limited to internships may also be considered

Job Type:

Intel Contract Employee

Shift:

Shift 1 (Mexico)

Primary Location:

Mexico, Guadalajara

Additional Locations:

Posting Statement:

Position of Trust

N/A

Work Model for this Role

Job Details:

Job Description:

The Role and Impact:
As a Module Development Engineer, you will spearhead the development and optimization of advanced semiconductor manufacturing processes crucial to delivering Intel's high-performance devices. In this role, you will design experiments, analyze data, and refine process methodologies, ensuring seamless integration and manufacturability. Your work will directly contribute to Intel's leadership in creating cutting-edge device architectures and advancing the semiconductor industry forward.

Business Group:
Intel Foundry Technology Development is dedicated to delivering world-class manufacturing solutions that power Intel's product innovation. The team focuses on advancing semiconductor process engineering and enabling the design and production of industry-leading devices. Joining this organization means collaborating in a dynamic environment that supports Intel's continued leadership in the competitive semiconductor market.

Key Responsibilities:

Design, execute, and analyze experiments to optimize manufacturing processes for yield, functionality, and efficiency
Develop and sustain semiconductor processing techniques, including material selection, equipment optimization, and metrology system design
Conduct feasibility studies and pathfinding activities to identify innovative solutions for next-generation device architectures
Collaborate with equipment and material suppliers to evaluate, qualify, and integrate novel technology solutions into manufacturing workflows
Perform process characterization using Statistical Process Control (SPC), Design of Experiments (DOE), and advanced data analysis tools
Partner with cross-functional teams to ensure seamless process integration and manufacturability
Support technology transfer to high-volume manufacturing through training, audits, and process consistency across sites

Qualifications:

Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.

Minimum Qualifications:

PhD in Materials Science, Chemical Engineering, Mechanical Engineering, Electrical Engineering, Physics, Chemistry, or related STEM field

6+ months of experience in one or more of the following:

Proficiency in semiconductor manufacturing techniques such as lithography, etching, thin film deposition, or planarization
Expertise in process characterization methods and statistical analysis tools like MATLAB, JMP, or Python
Familiarity with materials characterization techniques such as SEM, TEM, XPS, or ellipsometry

Preferred Qualifications:

Experience with advanced device architectures and process integration challenges, such as transistor scaling or selectivity control
Hands-on experience with equipment troubleshooting, maintenance, or development alongside suppliers
Knowledge of manufacturing technologies including vacuum processes, ALD, or CVD
Strong problem-solving skills and the ability to manage multiple tasks in a fast-paced environment
Collaborative mindset with a proven track record of working across interdisciplinary teams to achieve shared objectives

For information on Intel’s immigration sponsorship guidelines, please see Intel U.S. Immigration Sponsorship Information

Job Type:

College Grad

Shift:

Shift 1 (United States of America)

Primary Location:

US, Oregon, Hillsboro

Additional Locations:

Posting Statement:

Position of Trust

N/A

Benefits

Annual Salary Range for jobs which could be performed in the US: $133,800.00-188,890.00 USD

Work Model for this Role

Job Details:

Job Description:

This is a Temporary position (12 months)

Key Responsibilities

Develop and execute System-on-Chip (SoC)-level power delivery, Power Rails Stress (PRS), maximum current (ICCmax), current transient (di/dt), minimum/maximum voltage (Vmin/Vmax), Digital Linear Voltage Regulator (DLVR)/Fully Integrated Voltage Regulator (FIVR), and concurrency plans, including feasibility study and design/verification/simulation of the Power Distribution Network (PDN) and sign-off of IR-drop/Electromigration (IR/EM) metrics, across Intel products.
Collaborate with architecture, design, firmware, software, Power Management architects, and layout teams to ensure power delivery meets competitive targets and specifications and to define and implement power gating solutions.
Establish and execute methodologies for validating hardware/software optimizations and to converge the design on all Power Distribution Network (PDN) metrics, ensuring alignment with business Key Performance Indicators (KPIs).
Perform System-on-Chip (SoC)-level debug to identify root causes and resolve functional and triage failures related to power delivery, on-die power grid/network, thermal, and performance.
Configure and set up data loggers to collect and analyze power/thermal data, and work with the package integration team to ensure the complete IP system meets the design specification.
Develop and maintain validation infrastructure (performance monitors, behavioral checkers, and testing environments) and work with the post-silicon debug team to triage, debug, and fix potential Power Distribution Network (PDN) issues.
Produce comprehensive validation reports summarizing activities and results and communicate findings effectively with relevant teams.
Drive continuous improvements to validation strategies, methodologies, and processes.

The ideal candidate should show the following behavioral traits

Strong analytical and problem-solving skills.
Effective communication and documentation skills for cross-functional collaboration.
Advanced teamwork to work across teams in multi-faceted groups (architecture, design, verification, firmware, software, and platform teams).

Qualifications:

Minimum qualifications, you must possess the below minimum qualifications to be initially considered for this position.

Bachelor’s degree in Electronics, Electrical, Computer Engineering, or related field.
1+ years of experience in System-on-Chip (SoC) power and performance validation and/or digital logic and optimization.
1+ years of experience developing and / or optimization of power/performance Key Performance Indicators (KPIs) and/or circuit design trade-off for power, performance, and area.
Intermediate to advanced English level.

Must have unrestricted, permanent right to work in Mexico (this role is not eligible for visa or immigration sponsorship).

Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

A master's degree is preferred.
Debugging experience for System-on-Chip (SoC)-level power, thermal, and performance failures.
Power Delivery design, implementation, and validation of high-performance and low-power designs.
Knowledge of hardware/software optimizations for power and performance.
Low power implementation techniques.
Experience with System-on-Chip (SoC)-level debug using Joint Test Action Group (JTAG) debuggers.
Familiarity with validation tools such as data acquisition/loggers, behavioral checkers, and state space coverage techniques.
Familiar with system board design/debugging and usage of lab equipment like Oscilloscope and Logic analyzer.
Experience with Power Delivery Integrity (PDI) validation infrastructure setup.
Experience with Python Programming language.

Requirements may be met through a combination of relevant industry experience, internship experience, and/or academic work, coursework, or research. Candidates who have completed their degree and whose professional experience is limited to internships may also be considered.

Job Type:

Intel Contract Employee

Shift:

Shift 1 (Mexico)

Primary Location:

Mexico, Guadalajara

Additional Locations:

Posting Statement:

Position of Trust

N/A

Work Model for this Role

Job Details:

Job Description:

As a Technical Engineer, you will play a key role in developing, validating, and optimizing Memory, Ethernet and networking solutions for Intel's Xeon D platform. You will collaborate with cross-functional teams to ensure seamless integration, performance reliability, and quality assurance across hardware and software components. Your contributions will directly enhance Intel's data center solutions, advancing innovation in cloud and networking technologies.

This is a Temporary position (24 months).

Business group

This position is part of Intel's Data Center Group (DCG), which drives advancements in computing and connectivity for data centers and enterprise environments. The team focuses on delivering high-performance, scalable solutions for networking, storage, and cloud platforms, supporting Intel's mission to empower businesses with cutting-edge technology.

Key Responsibilities

Execute and track electrical validation test plan strategies of the Analog Front End (AFE) and end-to-end interconnections across Intel Xeon D platforms.
Perform test setups and configurations across interfaces such as Networking (Eth, CPRI) and Mem (DDR5, LPDDR5x). Across link speeds ranging from: 1G, 2.5G, 10G, 25G, and up to 100G, including NRZ and PAM4 signaling.
Validate conformance to networking and JEDEC industry standards and Intel specifications. Supporting both networking single protocol and mult-protocol implementations.
Apply Intel developed validation disciplines, including:
Signal Integrity (SI) Validation
System Marginality Validation and/or Interoperability methodologies and processes
Develop debug documentation with lab experiences during execution and system issues resolution.
Investigate and support resolution of complex issues involving hardware, BIOS, firmware, and operating system interactions.
Collaborate with core team and support requests by translating validation results/findings into actionable execution solutions.
Develop and maintain comprehensive testing frameworks to ensure product reliability and scalability.

The ideal candidate should show the following behavioral traits

Excellent communication and teamwork skills to support cross-functional collaborations.
Strong analytical and problem-solving skills.

Qualifications:

Minimum qualifications, you must possess the below minimum qualifications to be initially considered for this position.

Bachelor's degree in electrical engineering, Computer Engineering, or a related field.

1+ year of experience in hardware validation, including experience gained through internships, university projects, coursework, laboratory work, or hands-on training, with a focus on:

- Signal integrity, electronic circuit analysis, and data analysis techniques.
- System Validation, electronic circuit analysis, and data analysis techniques.

Intermediate to advanced English level.

Must have unrestricted, permanent right to work in Mexico (this role is not eligible for visa or immigration sponsorship).

Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Master's degree in electrical engineering, Computer Engineering, or a related field.
Proficiency in Memory technologies (RDIMM, UDIMM, SODIMM, MRDIMM) and/or networking protocols (Ethernet, CPRI technologies)
Familiarity with debugging tools and validation methodologies.
Familiarity with Bit Error Rate testers and high bandwidth oscilloscopes.
Familiarity with AFE validation and end to end system validation.
Experience with interoperability testing across multiple vendors or platforms.
Knowledge of system level validation spanning silicon, platform, and software layers

Job Type:

Intel Contract Employee

Shift:

Shift 1 (Mexico)

Primary Location:

Mexico, Guadalajara

Additional Locations:

Posting Statement:

Position of Trust

N/A

Work Model for this Role

Job Details:

Job Description:

The Role and Impact:
As a Module Equipment Development Engineer, you will lead the development and optimization of advanced semiconductor manufacturing equipment and processes, enabling Intel to deliver high-performance devices. Your contributions will directly impact Intel's technological leadership in the semiconductor industry and advance the capabilities of future technologies.

Business Group:
Intel Foundry Technology Development is focused on advancing semiconductor process engineering and delivering world-class manufacturing solutions that power Intel's product innovation. Working within this group, you will collaborate with global teams to develop cutting-edge technologies that enable the design and production of leading-edge devices, helping Intel maintain its leadership in a competitive and fast-paced market.

Key Responsibilities:

Develop Equipment capable of delivering on new process requirements in Dielectrics Thin Films.
Develop robust Equipment modules that can be transferred seamlessly to high volume manufacturing.
Collaborate with equipment and material suppliers to evaluate, qualify, and implement novel technologies into manufacturing processes
Support technology transfer to high-volume manufacturing through training, audits, and maintaining process consistency across sites
Design, execute, and analyze experiments to optimize advanced manufacturing processes, including material selection, equipment metrology, and parameter tuning
Perform feasibility studies and pathfinding activities to support innovative device architectures and future technology roadmaps
Utilize advanced data analysis methods, including Statistical Process Control (SPC) and Design of Experiments (DOE), to guide process improvements and enhance yield
Partner with cross-functional teams to ensure seamless process integration and manufacturability

Qualifications:

Minimum Qualifications:

Bachelor's degree in Materials Science, Chemical Engineering, Physics, Chemistry, Electrical Engineering, or related STEM field, with 4+ years of industry experience in semiconductor processing

Master's degree in relevant STEM fields with 3+ years of domain-specific experience

PhD in Materials Science, Chemical Engineering, Physics, Chemistry, or related STEM field with 6+ months experience in semiconductor processing

Industry experience in semiconductor processing/domain-specific experience includes one of more of the following:

Proficiency in semiconductor processing techniques such as lithography, etching, thin film deposition, or planarization
Expertise in process characterization methods and statistical analysis tools, such as JMP, MATLAB, or Python
Familiarity with materials characterization techniques like SEM, TEM, XPS, or ellipsometry

Preferred Qualifications:

Hands-on experience working with equipment troubleshooting, maintenance, or development in collaboration with suppliers
Experience at a Semiconductor manufacturing tool supplier.
Knowledge of manufacturing technologies including vacuum processes, ALD, or CVD
Strong problem-solving skills with the ability to manage multiple tasks in a fast-paced environment
Collaborative mindset with a proven track record of working across interdisciplinary teams to achieve shared goals

For information on Intel’s immigration sponsorship guidelines, please see Intel U.S. Immigration Sponsorship Information

Job Type:

Experienced Hire

Shift:

Shift 1 (United States of America)

Primary Location:

US, Oregon, Hillsboro

Additional Locations:

Posting Statement:

Position of Trust

N/A

Benefits

Annual Salary Range for jobs which could be performed in the US: $115,110.00-219,550.00 USD

Work Model for this Role

Job Details:

Job Description:

The Role and Impact

This is a Temporary position (12 months)

Key Responsibilities

Develop and execute System-on-Chip (SoC)-level power, thermal, performance, and Power Management validation and optimization plans across Intel products.
Collaborate with architecture, design, firmware, and software teams to ensure power, thermal, performance, and Power Management meet competitive targets and specifications.
Establish and execute leakage, Dynamic Capacitance (Cdyn), Thermal Design Power (TDP), Digital Thermal Sensor (DTS), thermal protectors (Catastrophic Trip, Processor Hot), Inverse Temperature Dependence (ITD), thermal margin, System-to-- Tester (S2T) correlation, data collection for the Electrical Critical Path (ECP), and Power Management methodologies - CPU idle power States (C-states), Package C6 (pkgC6), link low-power states (L1, L0p), tunings (Dynamic Voltage and Frequency Scaling, ring scalability, Power Virus Pattern, Running Average Power Limit, etc.), Fixed Frequency Performance (FFP) and Power Constrained Performance (PCP) recipes - to validate hardware/software optimizations and ensure alignment with business Key Performance Indicators (KPIs).
Perform System-on-Chip (SoC)-level debug to identify root causes and resolve functional and triage failures related to power, thermal, Power Management, and performance.
Configure and set up data acquisition/loggers' equipment (e.g. Yokogawa) to collect and analyze power-thermal data.
Develop and maintain validation infrastructure, including power/performance monitors, behavioral checkers, and testing environments.
Produce comprehensive validation reports summarizing activities and results and communicates findings effectively to relevant teams.
Drive continuous improvements to validation strategies, methodologies, and processes.

The ideal candidate should show the following behavioral traits

Strong analytical and problem-solving aptitude.
Effective communication and documentation skills for cross-functional collaboration.
Willing to work across team in multi-faceted groups (architecture, design, verification, firmware, software, and platform teams.)

Qualifications:

Minimum qualifications, you must possess the below minimum qualifications to be initially considered for this position.

Bachelors in Electronics, Electrical, Computer Engineering, or related field.
1+ years of experience in SoC power, thermal, performance, and/or power management validation.
1+ years of experience developing and / or optimization of power/performance and power management KPI's.
Advanced English level.

Must have unrestricted, permanent right to work in Mexico (this role is not eligible for visa or immigration sponsorship).

Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

A Master's degree in is preferred.
Debugging experience for SoC-level power, thermal, performance, and power management failures.
Knowledge of hardware/software optimizations for power, thermal, performance, and power management.
Experience with System (SoC) level debug using JTAG debuggers.
Familiarity with validation tools such as data acquisition/loggers (i.e. Yokogawa), behavioral checkers, and state space coverage techniques.
Familiar with system board design/debugging and usage of lab equipment like Oscilloscope and Logic analyzer.
Experience with power-thermal and performance modeling, benchmarking, and validation infrastructure setup.
Experience with Python Programming language.

Job Type:

Intel Contract Employee

Shift:

Shift 1 (Mexico)

Primary Location:

Mexico, Guadalajara

Additional Locations:

Posting Statement:

Position of Trust

N/A

Work Model for this Role

Job Details:

Job Description:

Leads a team of technicians responsible for manufacturing operations, equipment maintenance, troubleshooting, and repair activities. Owns safety, quality, staffing, scheduling, and employee performance management while serving as the first point of escalation for on-shift operational, safety, and security issues. Drives efficient factory operations by overseeing workflow, optimizing processes, and coordinating across functional teams to meet production, quality, cost, and output objectives. Ensures area performance through effective workforce planning, training, development, and retention. Manages shift operations, including workstation assignments, rotations, vacations, overtime, break coverage, and contingency staffing. Maintains required certification levels and workforce readiness to support production and wafer ramp targets. Partners with engineering teams to resolve equipment and operational issues, improve tool performance, and sustain manufacturing health. Oversees both scheduled and unscheduled maintenance activities and develops strategies to enhance operational capability and support future manufacturing requirements. Responsible for setting clear goals, driving accountability, fostering employee development, and enabling successful team execution. Delivers results by promoting a culture of safety, collaboration, continuous improvement, and operational excellence while role-modeling company values and maintaining a productive work environment. Shift Schedule: Shift 6 (Night Shift): PM/AM, Wednesday through Friday, plus alternating Saturdays.

Qualifications:

Minimum Qualifications:

Bachelor's degree or higher in Chemical Engineering, Materials Science and Engineering, Electrical Engineering, Physics, Mechanical Engineering, or a related engineering discipline with 1+ years of semiconductor manufacturing or wafer fabrication experience.
OR 5+ years of semiconductor manufacturing or wafer fabrication experience.
OR 4+ years of people management or leadership experience in a manufacturing or military environment.

Job Type:

Experienced Hire

Shift:

Shift 6 (United States of America)

Primary Location:

US, New Mexico, Albuquerque

Additional Locations:

Posting Statement:

Position of Trust

N/A

Benefits

Annual Salary Range for jobs which could be performed in the US: $89,010.00-170,630.00 USD

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

Job Details:

Job Description:

The Role and Impact
As a Software Application Development Engineer, you will be responsible for designing, developing, testing, and debugging software applications used by end-users or integrated with other applications by ISVs. You will work across the full application stack, focusing on both frontend and backend development with modern programming languages and secure coding practices. Your contributions will directly enable high-quality, scalable, and efficient solutions, playing a key role in advancing technology initiatives within Intel.

Business Group
You will be part of a dynamic and innovative team within Intel that focuses on delivering state-of-the-art software solutions to empower users and applications worldwide. Through collaboration and cutting-edge development, our group supports Intel's mission to drive technological advancements and transform how end users interact with and benefit from Intel-powered innovations.

Key Responsibilities:

Design, develop, test, and debug software applications for end-users or integrated with third-party applications.
Contribute to both frontend and backend development using modern software methodologies and programming languages.
Write functional and test code, automate build and deployment processes, and perform unit, integration, and end-to-end testing.
Follow secure coding practices and ensure compliance with software legal guidelines.
Analyze user stories to translate requirements into practical software solutions.
Collaborate with cross-functional teams to ensure efficient infrastructure planning and functionality.
Complete product documentation and procedures for installation and maintenance.
Interact with end-users to define system requirements and implement necessary modifications.

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Qualifications:

Minimum Qualifications:
Bachelor's degree in Computer Science, Computer Engineering, or related field with 6+ years of hands-on experience in software development professional experience.

US Citizenship required.
Ability to obtain and maintain a US Government Security Clearance.
Proficiency in scripting languages like Python or Perl.
Familiarity with Linux shells and command-line interfaces (CLI).

Preferred Qualifications:

Master’s degree in a relevant technical field with 4+ years of experience; OR Ph.D. in a relevant technical field with 2+ years of experience.

Experience with industry-standard tools such as Ansible, Cobbler, Containers, and Kubernetes.
Knowledge of Linux operating systems (preferably SUSE).
Exposure to continuous monitoring solutions like Elastic, Kibana, and Grafana.
Basic understanding of networking protocols such as TCP/IP, DNS, and HTTP/S.
Familiarity with static typed programming languages such as Java or C++.

Join us and be part of a team that drives innovation, fosters growth, and creates impactful technology solutions. Your contributions will shape the future and make a meaningful difference in the world.

Job Type:

Experienced Hire

Shift:

Shift 1 (United States of America)

Primary Location:

US, California, Santa Clara

Additional Locations:

Posting Statement:

Position of Trust

N/A

Benefits

Annual Salary Range for jobs which could be performed in the US: $137,610.00-265,870.00 USD

Work Model for this Role

Job Details:

Job Description:

About the Role

Intel Information Technology (IT) is seeking a Senior F5 Application Delivery Network Engineer join a high-performing team responsible for delivering secure, reliable, and scalable application delivery services across Intel's global enterprise environment.

In this role, you will serve as a senior technical contributor responsible for designing, implementing, automating, and supporting enterprise-scale application delivery and load-balancing solutions. You will collaborate with network engineering, security, cloud, infrastructure, and application teams to ensure business-critical services remain highly available, secure, and optimized for performance.

The ideal candidate combines deep expertise in F5 technologies with strong problem-solving skills, a continuous-improvement mindset, and a passion for building and operating highly available infrastructure at scale.

What You’ll Do

Key responsibilities will include but not limited to:

Provide senior-level engineering expertise for F5 BIG-IP application delivery platforms.
Engineer, configure, test, and support application delivery and load-balancing solutions.
Lead troubleshooting and resolution of complex F5 and application connectivity issues.
Serve as a senior escalation point for critical production and manufacturing incidents.
Drive platform availability, resiliency, standardization, and continuous improvement.
Lead evaluation, testing, pilot, and production readiness activities for major architecture, operating system, and configuration changes.
Develop and maintain standardized configurations, engineering documentation, operating procedures, and troubleshooting knowledge.
Lead or support platform lifecycle activities, including software upgrades and end-of-support/end-of-life refresh.
Partner with manufacturing engineering teams on testing, releases, critical changes, factory shutdown activities, and complex production issues.
Work with F5 and other technology suppliers on complex technical issues and product escalations.
Review application requirements and translate them into secure, scalable, and highly available application delivery solutions.
Identify opportunities for automation and self-service to improve engineering efficiency and reduce operational risk.
Participate in technical reviews and provide engineering guidance for new capabilities and deployments.
Mentor junior engineers and help build deeper technical capability across the team.

Behavioral traits that we are looking for:

Strong ownership and accountability for service reliability and operational excellence.
Ability to effectively manage priorities and make sound decisions in fast-paced environments.
Excellent analytical and problem-solving skills with a structured approach to troubleshooting.
A continuous-learning mindset and curiosity for emerging technologies.
Strong collaboration and relationship-building skills across technical and non-technical teams.
Ability to influence through technical expertise, communication, and partnership.
Commitment to documentation, process improvement, and knowledge sharing.
Customer-focused thinking with an understanding of business impact and service quality.
Resilience and composure during production incidents and critical situations.
A proactive approach to identifying risks, opportunities, and operational improvements.

Intel invests in our people and offers a complete and competitive package of benefits employees and their families through every stage of life.

See Intel Benefits for more details.

Qualifications:

Note:

This position is not eligible for Intel immigration sponsorship.

Minimum Qualifications and Experience:

Bachelor's degree in Computer Science, Information Systems, Computer Engineering, Electrical Engineering, or another STEM-related field and 4+ years of experience. Or a Master's degree in a related field and 2+ years of experience.

Your experience described above must be in the following:

Experience with TCP/IP, DNS, HTTP/HTTPS, routing, load balancing, certificates, and application/network troubleshooting.
Experience designing, implementing, and troubleshooting all F5 BIG-IP modules including but not limited to lifecycle/ configuration management and platform resiliency
Experience supporting highly available, business-critical production environments.
Troubleshoot incidents under operational pressure and drive issues through root-cause resolution.
Experience with LTM (Local Traffic Manager), virtual servers, pools, health monitors, profiles, persistence, SSL/TLS, and traffic management.
Experience developing iRules and advanced traffic-management policies.

Preferred Qualifications and Experience:

Experience with infrastructure automation using Python, Ansible, REST APIs, or similar tools.
Experience integrating application delivery technologies with cloud or hybrid-cloud environments.
Experience supporting large-scale manufacturing or other mission-critical environments.
F5 professional certification or equivalent demonstrated technical experience.
Experience designing resilient solutions and eliminating single points of failure.
Understanding of modern application architectures, APIs, containers, and cloud-native application delivery is beneficial.

Why Join Intel?

At Intel, IT is a strategic enabler of the technology that powers the world's leading semiconductor company. As part of this team, you will work on large-scale, mission-critical infrastructure supporting Intel's global operations while helping drive modernization, automation, security, and reliability initiatives. You'll collaborate with highly skilled engineers, influence technical direction, and have opportunities to grow your expertise across networking, cloud, automation, and application delivery technologies.

Job Type:

Experienced Hire

Shift:

Shift 1 (United States of America)

Primary Location:

US, Oregon, Hillsboro

Additional Locations:

US, California, Folsom

Posting Statement:

Position of Trust

N/A

Benefits

Annual Salary Range for jobs which could be performed in the US: $137,610.00-227,270.00 USD

Work Model for this Role

Job Details:

Job Description:

Join Intel's Communications Runtime team and help build the communication software stack powering the world's largest AI and High-Performance Computing (HPC) workloads. As a Senior AI Software Development Engineer, you will architect, develop, and optimize the oneAPI Collective Communications Library (oneCCL), enabling scalable, high-performance communication across Intel CPU and GPU platforms.

In this role, you will solve complex distributed systems challenges spanning collective communication algorithms, communication runtimes, networking technologies, operating systems, and large-scale AI training infrastructure. You will work across the software stack, collaborating with architects, researchers, and engineers to deliver breakthrough performance for AI model training, scientific computing, and next-generation distributed computing workloads.

This is a highly visible technical role with opportunities to influence Intel's software roadmap, contribute to open-source communities, and drive innovations that scale across thousands of processors and accelerators.

Key Responsibilities

Design, develop, and optimize collective communication algorithms and runtime capabilities within oneCCL.

Improve scalability, latency, bandwidth utilization, resilience, and overall communication performance across distributed systems.

Lead performance optimization initiatives for multi-node and multi-accelerator AI and HPC workloads.

Investigate and resolve complex system-level performance, reliability, and interoperability issues.

Collaborate closely with hardware architects, software engineers, researchers, open-source contributors, and strategic customers.

Contribute to and influence open-source communication and networking technologies.

Drive engineering decisions through data-driven analysis and performance insights.

Qualifications:

Minimum Qualifications

Bachelor's degree in Computer Science, Computer Engineering, Electrical Engineering, or a related field with 3+ years of relevant experience.

Strong software development experience using C/C++.

Experience developing systems software, middleware, runtime software, networking software, or communication libraries.

Hands-on experience diagnosing and optimizing performance, scalability, and reliability in complex distributed systems.

Experience in distributed systems, operating systems, concurrency, networking, and computer architecture.

Experience developing software in Linux environments.

Preferred Qualifications

Experience with collective communication frameworks such as oneCCL, MPI, NCCL, RCCL, UCX, OpenSHMEM, or libfabric.

Experience supporting distributed AI training, machine learning infrastructure, or HPC applications.

Experience optimizing communication performance across multiple nodes, GPUs, or accelerators.

Familiarity with RDMA technologies and high-performance networking environments.

Experience developing software for GPU, accelerator, or heterogeneous computing platforms.

Open-source software development experience.

Customer-facing experience troubleshooting complex technical and performance-related challenges.

Preferred Technical Skills

Experience with several of the following technologies:

Programming & Development

C/C++

Linux

Communication Libraries & Runtimes

oneCCL

NCCL

Libfabric

OpenSHMEM

AI & Accelerated Computing

oneAPI

SYCL

PyTorch Distributed

DeepSpeed

Horovod

Networking Technologies

RDMA

InfiniBand

RoCE

Performance Analysis & Debugging

Intel VTune Profiler

What You'll Bring

You are a highly motivated software engineer with a passion for distributed systems, performance optimization, and large-scale computing. You thrive in solving complex technical challenges, collaborating

Job Type:

Experienced Hire

Shift:

Shift 1 (United States of America)

Primary Location:

US, Oregon, Hillsboro

Additional Locations:

US, Texas, Austin

Posting Statement:

Position of Trust

N/A

Benefits

Annual Salary Range for jobs which could be performed in the US: $133,410.00-240,710.00 USD

Work Model for this Role

Job Details:

Job Description:

The Role and Impact
As a Software QA Test Engineer, you will play a pivotal role in ensuring the quality and reliability of Intel's software products. Through systematic testing, you will help develop and maintain high standards, contributing directly to the functionality and performance of key technologies. Your day-to-day responsibilities will involve creating and executing detailed test plans, analyzing results, and collaborating with development teams to resolve issues, ensuring software meets rigorous quality benchmarks.

In this role, you will identify and isolate defects across software systems and tool interfaces, drive thorough root cause investigations, collaborate directly with software development and engineering teams, and champion quality engineering best practices across the development lifecycle. Your work directly influences the stability, automated efficiency, and operational excellence of mission-critical software powering Intel Mask Operation.

Business group
This role is part of Intel's engineering organization, which drives innovation and excellence in software and hardware development to support Intel's broader goals of delivering cutting-edge technology solutions. Our team focuses on ensuring product quality through robust testing methodologies, fostering collaboration, and advancing Intel's leadership in the tech industry.

Key Responsibilities:

Test Strategy & Systematic Execution

Design, implement, and execute systematic software test plans, test cases, and test suites across diverse operational environments, toolsets, and system configurations.
Formulate clear, repeatable test standards and validation procedures to verify software functionality against architectural specifications and engineering requirements.
Validate end-to-end user workflows, system performance characteristics, and software interoperability within production and development environments.

Test Automation & Infrastructure

Build, enhance, and maintain automated test scripts and frameworks to accelerate test execution and expand regression coverage.
Validate multi-system integrations, data flows, and web service/API calls across interconnected tools and distributed systems.
Integrate automated test suites into modern Continuous Integration / Continuous Deployment (CI/CD) pipelines to enable continuous quality feedback and rapid validation cycles.

Debugging, Defect Triage & Root Cause Analysis

Isolate complex, intermittent, and multifaceted software defects using modern debugging tools and systematic diagnostic methodologies.
Conduct deep-dive root cause analyses (RCA) and partner with development teams to formulate, verify, and document effective corrective actions.
Maintain comprehensive documentation of test findings, defect metrics, and verification records to ensure complete end-to-end traceability.

Cross-Functional Collaboration & Quality Advocacy

Partner actively with software architects, development engineers, and operational stakeholders within IMO to resolve technical blockers and align on acceptance criteria.
Participate in technical design and code reviews, providing actionable quality insights regarding system interfaces, scripting standards, and testability.
Promote modern testing practices, fostering continuous improvement in test coverage, automated tooling, and team agility.

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Qualifications:

Minimum Qualifications:

Bachelor’s degree in Computer Science, Software Engineering, Electrical/Computer Engineering, or a closely related technical discipline with 6+ years of hands-on experience in software quality engineering, validation, or software development experience in the following:

US Citizenship required.
Ability to obtain and maintain a US Government Security Clearance.
Test automation development and scripting using languages such as Python, Bash, or equivalent.
Hands-on experience debugging complex software stacks, including systematic root cause analysis, log analysis, and defect isolation tools.
Testing web services/APIs (REST, RPC, etc.) and communication mechanisms across distributed or interconnected systems.
Standard software testing levels and methodologies (unit, integration, functional, regression, and performance testing).

Preferred Qualifications:

Master’s degree in a relevant technical field with 4+ years of experience; OR Ph.D. in a relevant technical field with 2+ years of experience.

CI/CD & DevOps: Hands-on experience integrating test frameworks within CI/CD pipelines (e.g., GitHub Actions, GitLab CI, Jenkins) and containerized test environments (e.g., Docker).
Development Lifecycle: Working familiarity with Agile/Scrum development methodologies and defect/project tracking workflows (e.g., Jira).
Semiconductor / Manufacturing Systems Context: Exposure to semiconductor manufacturing software, EDA / layout processing tools, platform-level software, OS internals (Linux/Windows), or system computation software.
Communication & Analytical Rigor: Exceptional analytical and problem-solving skills, with a proven track record of clearly articulating technical issues to cross-functional engineering teams.
Continuous Learning: Demonstrated passion for exploring emerging QA tools, automation frameworks, and modern quality assurance paradigms.

Join us to be part of a collaborative team that is shaping the future of technology through quality and innovation.

Job Type:

Experienced Hire

Shift:

Shift 1 (United States of America)

Primary Location:

US, California, Santa Clara

Additional Locations:

Posting Statement:

Position of Trust

N/A

Benefits

Annual Salary Range for jobs which could be performed in the US: $137,610.00-265,870.00 USD

Work Model for this Role

Job Details:

Job Description:

Join Intel's AI Revolution Intel's AI SoC organization develops cutting-edge products powering a wide range of AI applications, from edge devices to data center accelerators. If you are an engineer with strong technical and communication skills who thrives in a fast-paced environment with abundant learning opportunities, you are the ideal candidate for this role. Join us to shape the future of AI hardware.

This role is at the heart of Intel's product development process, combining technical expertise, creative problem-solving, and disciplined execution. By joining our team, you will contribute to the design and development of next-generation technologies that power the future of computing, enabling transformative experiences for billions of users worldwide. This is your opportunity to work alongside some of the brightest minds in the industry, leveraging innovative methodologies to overcome challenging design problems and shaping the future of technology.

Key Responsibilities:
Develop logic design, RTL coding, and simulation for SoC designs.
Define and implement architecture and microarchitecture features for logic blocks.
Perform quality checks across RTL, timing, power, and design integrity to meet performance goals.
Optimize RTL logic to ensure compliance with power, performance, area, and timing targets.
Collaborate with IP providers to integrate and validate IPs at the SoC level.
Review and contribute to verification plans and ensure design features are comprehensively tested.
Identify and resolve RTL test failures to ensure feature correctness.
Employ secure development practices to address security objectives and threats in the design.
Drive quality assurance compliance for seamless IP and SoC handoff throughout the design flow.

Qualifications:

Minimum Qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, or related field with 1+ years of hands-on experience in logic design, RTL coding, and simulation, with demonstrated skills gained through internships, academic projects, coursework, or hands-on training OR a Master's degree in Electrical Engineering, Computer Engineering, or related field with no prior professional experience.

Proficiency in RTL coding languages such as Verilog or VHDL.
Familiarity with logic design tools and methodologies for synthesis, timing analysis, and power optimization.
Knowledge of design principles for SoCs and IP integration.

Preferred Qualifications:
Strong analytical and problem-solving skills with a keen eye for detail.
Effective communication and collaboration skills for cross-functional teamwork.
Interest in contributing to secure design practices and quality assurance processes.

Your expertise will support Intel's leadership in innovation and technology. Take the next step in your career journey by applying today.

Job Type:

College Grad

Shift:

Shift 1 (United States of America)

Primary Location:

US, California, Santa Clara

Additional Locations:

US, California, Folsom

Posting Statement:

Position of Trust

N/A

Benefits

Annual Salary Range for jobs which could be performed in the US: $105,650.00-172,860.00 USD

Work Model for this Role

Job Details:

Job Description:

The Role

Join Intel as a Software Performance Engineer and help optimize the next generation of computing platforms. In this role, you will work across software and hardware layers to analyze, benchmark, and improve system performance. You will collaborate with experienced engineers to identify opportunities for optimization and develop solutions that help customers maximize the value of Intel technologies.

This position is well-suited for engineers who are passionate about software development, system performance, and emerging technologies including AI, cloud computing, high-performance computing (HPC), and client platforms.

What You’ll Do

Key responsibilities will include but not limited to:

Optimize cross-stack software to enhance Intel platform performance across various technology segments.
Analyze and benchmark platform performance, including power, security, responsiveness, and system-level measurement methodologies.
Develop KPIs and KEIs to evaluate platform performance and ensure measurable outcomes.
Collaborate with customers and partners as a trusted technical advisor to identify opportunities that showcase Intel technology.
Understand partner and customer software stacks to provide meaningful insights and influence roadmaps for Intel platforms.
Drive innovation by applying expertise in both software and hardware optimization to create impactful solutions.

Behavioral traits that we are looking for:

Strong analytical and problem-solving skills.
Curiosity and a passion for learning new technologies.
Attention to detail and commitment to high-quality results.
Ability to work effectively in a collaborative team environment.
Initiative and ownership in driving tasks to completion.
Adaptability and comfort working in a fast-paced environment.
Strong communication skills with the ability to explain technical concepts clearly.
Customer-focused mindset with an interest in understanding real-world usage scenarios.

Intel invests in our people and offers a complete and competitive package of benefits employees and their families through every stage of life.

See Intel Benefits for more details.

Qualifications:

Note:

For information on Intel’s immigration sponsorship guidelines, please see

Intel U.S. Immigration Sponsorship Information

Minimum Qualifications and Experience:

Master's degree expected by August 2027 in Computer Science, Electrical Engineering, or a related with 3+ months of educational or work experience.

Your experience described above must be in the following:

Programming languages such as Python, C++, or Java.
Cross-stack software optimization concepts and methodologies.
Hardware-software interactions.
Analyze performance metrics and develop benchmarking tools.

Preferred Qualifications and Experience:

Experience in developing KPIs/KEIs or system-level measurement methodologies.
Intel platforms and technologies is a plus.

Why Join Intel

This is your opportunity to join Intel's talented team and make a meaningful impact by contributing to the optimization of cutting-edge technologies. We encourage you to bring your creativity, technical expertise, and enthusiasm to help shape the future of computing. Apply today and start your journey with Intel.

Job Type:

College Grad

Shift:

Shift 1 (United States of America)

Primary Location:

US, Oregon, Hillsboro

Additional Locations:

Posting Statement:

Position of Trust

N/A

Benefits

Annual Salary Range for jobs which could be performed in the US: $111,030.00-181,940.00 USD

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

Job Details:

Job Description:

The Role and Impact

As the Technical Lab Operations Manager, you will lead a high-performing team to drive advanced technology development and manufacturing solutions for Intel Foundry. We are seeking a Technical Lab Operations Manager to lead the operation and continued development of engineering lab environments supporting semiconductor manufacturing equipment. This role will manage multiple technical laboratory environments supporting equipment training, engineering development, troubleshooting, repair activities, and validation. The successful candidate will be responsible for ensuring the labs operate safely, efficiently, and consistently while providing engineers and technicians with the equipment, tools, processes, and infrastructure needed to support manufacturing operations.

The position requires strong technical operations leadership, cross-functional coordination, and experience managing engineering environments involving complex automated equipment.

Business Group

Intel Foundry focuses on developing and scaling advanced manufacturing technologies to deliver industry-leading performance and innovation. As part of this dynamic organization, your team will play a critical role in aligning engineering efforts with Intel's broader goals, ensuring robust process and equipment solutions that empower global manufacturing success.

Key Responsibilities

Lead day-to-day operation of multiple technical engineering laboratories.
Own lab readiness, scheduling, capacity, equipment availability, and resource coordination.
Establish and maintain lab operating procedures, safety standards, access controls, and equipment-use requirements.
Coordinate equipment installation, maintenance, calibration, and laboratory infrastructure.
Support hands-on technical training and development activities for engineers and technicians.
Establish metrics for lab utilization, availability, safety, training activity, engineering throughput, and overall operational effectiveness.
Drive continuous improvement of laboratory processes and capabilities.
Develop strategic roadmaps for module engineering capabilities to align with future requirements.
Facilitate team growth through goal setting, performance management, and fostering an inclusive and productive work environment.

Behavioral Skills

Exceptional communication and collaboration skills to build and strengthen partnerships across organizations.
Commitment to fostering an inclusive and diverse workplace culture that enables team growth and success.
Strong written and verbal communication skills.

Qualifications:

Minimum Qualifications

Bachelor's degree in Electrical, Mechanical, or Chemical Engineering, Materials Science, Physics, or a related technical field.
6+ years of experience in semiconductor equipment or process engineering roles.
Experience should include the following:
- Experience managing technical facilities, engineering labs, equipment programs, or manufacturing support operations.
- Experience working with semiconductor equipment or complex automated manufacturing systems.
- Experience coordinating multidisciplinary engineering and technician teams.
- Experience establishing operational processes, safety controls, equipment management systems, and technical documentation.
- Project and resource-management skills.

Preferred Qualifications

Master's degree in Electrical, Mechanical, or Chemical Engineering, Materials Science, Physics, or a related technical field with 4+ years of experience in semiconductor equipment or process engineering roles
PhD in Electrical, Mechanical, or Chemical Engineering, Materials Science, Physics, or a related technical field with 2+ years of experience in semiconductor equipment or process engineering roles.
Experience with semiconductor capital equipment or advanced manufacturing systems.
Experience managing engineering development, training, equipment, or repair laboratory environments.
Familiarity with automated equipment, robotics, motion control, machine vision, industrial controls, or equipment development.
Experience supporting equipment troubleshooting, repair, maintenance, and engineering validation.
Experience developing technical training programs for engineers or technicians.
Experience standing up or expanding technical laboratory capabilities.
Strong analytical and problem-solving skills with a focus on operational efficiency and innovation.

Join us to lead impactful engineering teams, take on exciting challenges, and drive innovation in advanced manufacturing technologies. Apply today to be part of Intel's mission to shape the future of technology.

Job Type:

Experienced Hire

Shift:

Shift 1 (United States of America)

Primary Location:

US, Oregon, Hillsboro

Additional Locations:

Posting Statement:

Position of Trust

N/A

Benefits

Annual Salary Range for jobs which could be performed in the US: $155,520.00-255,200.00 USD

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

Job Details:

Job Description:

The Wafer Packaging Manufacturing organization is a global team at the heart of Intel's advanced packaging technology and high-volume manufacturing. Our vision is clear: optimize advanced packaging HVM processes end-to-end to maximize yield, quality, and customer satisfaction. WPM spans a broad and critical portfolio - including EMIB and Foveros wafer processing, TSV reveal, C4 bumping, Die Prep, and Wafer Level Assembly - supporting Intel's most strategic technologies across multiple sites worldwide

As a WPM Advanced Packaging Defect Reduction Engineer, you will play a pivotal role in protecting yield and elevating defect performance across some of the world's most advanced semiconductor packaging processes. Partnering with module engineering, QNR, manufacturing operations, and yield teams across our global network, you will bring together HVM manufacturing expertise with the technical rigor of a development organization to deliver impactful, lasting solutions. At WPM, we are more than a team - we are an organization that learns, grows, and succeeds and fails together, fostering a culture of trust, continuous improvement, and shared accountability where every individual's contribution drives our collective success.

Key Responsibilities

Own assigned advanced packaging layer(s), ensuring all POR defect inspection, classification, and review operations are properly established with healthy inspection recipes and NPI procedures defined.
Drive ADC implementation to ensure accurate defect classifications and maintain defect classification specs and Defect Menagerie for all assigned layers.
Partner with metro tool owners to set up and maintain SPC charts for every defect mode and layer, create OCAPs for Metro MTs and module engineering to respond to OOC events and defect tracers.
Own process health and product quality for the WPM manufacturing line, including defect performance, yield trends, excursions, and baseline process changes.
Own defect excursions through resolution, including containment, wafer/lot risk assessment, disposition, root cause, downstream impact, quality events, and non-POR material.
Drive systematic defect reduction and process improvement using process/metrology data, SORT data, DOEs, FRECLs, ATVs, and experiments with process modules.
Co-lead cross-functional defect health reviews, including IMTs, Focus Teams, and Task Forces covering tracers, trends, OOCs, wafers-at-risk, excursions, and corrective actions.
Extract, analyze, and correlate data to improve defects, yields, and VF matching, identifying key toolsets driving defects through analysis, MBPS, and FA.
Quantify chronic defect gaps to goal, document roadmaps to close gaps, and ensure defect health dashboards are operational and incorporated into factory business processes.
Communicate defect metrics and findings to module and factory stakeholders through weekly summaries and strategic quarterly reviews, while providing defect training to technicians, peers, and module teams.

Behavioral traits:

Proven ability to lead problem-solving initiatives and process improvement projects.
Exceptional communication skills for effectively collaborating across multidisciplinary teams.
Passion for mentoring and fostering technical growth within teams.

Qualifications:

Minimum Qualifications

Bachelor's degree in engineering or a related field and 3+ years of experience OR Master's degree in engineering or a related field and 2+ years of experience OR PhD in engineering or a related field with no prior professional experience.
Experienced mentioned above should be a combination of the following areas:
- Data extraction, synthesis, and analysis using tools such as SQL and Python.
- Technology transfer and new product introduction (NPI) activities in semiconductor manufacturing.
- Expertise in failure analysis and data mining techniques to identify trends and drive actionable improvements.

Preferred Qualifications

Strong understanding of semiconductor process flow, equipment, and process characterization techniques.
Experience with design of experiments (DOE), statistical process control (SPC), and process capability analysis.

We are looking for motivated individuals eager to make a meaningful impact in shaping Intel's manufacturing leadership. If you are excited about driving innovation and delivering groundbreaking solutions, we encourage you to take the next step and join our team.

Job Type:

Experienced Hire

Shift:

Shift 1 (United States of America)

Primary Location:

US, New Mexico, Albuquerque

Additional Locations:

US, Oregon, Hillsboro

Posting Statement:

Position of Trust

N/A

Benefits

Annual Salary Range for jobs which could be performed in the US: $103,730.00-146,440.00 USD

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

Job Details:

Job Description:

Leads the strategy, definition, and execution of software architectures, platforms, tools, frameworks, infrastructure, and ecosystem enabling technologies across Intel products and solutions. Defines technical direction across the software stack spanning firmware, drivers, operating systems, runtimes, frameworks, algorithms, applications, development tools, software quality, software integration, and ecosystem enablement. Establishes architectural approaches, development methodologies, optimization strategies, and hardware software codesign practices that maximize the value and adoption of Intel technologies. As a Distinguished Engineer, recognized across Intel and industry as a leading technical authority solving the most critical technology, product, customer, and business challenges through technical mastery, innovation, execution, and influence while establishing technical direction, driving strategic initiatives, delivering measurable business impact, and building the technical foundations for Intel's future growth and leadership.

Architects, designs and provides technical oversight of the development of Intel GPU AI software. Scope spans the entire stack including firmware, drivers, frameworks, protocols, algorithms, and/or applications. Interacts with technologists across Intel and within the industry to evaluate feasibility of requirements and determine priorities for development. This role will interface regularly with architects of relevant components, engineers, management as well as be available to cross functional partners like product management, Systems, and SoC. Responsible for ensuring that the software stack is built to meet the requirements outlined for the product in terms of supported workloads, capabilities needed, performance, stability, and ease of use. Responsible for key technical design decisions, and will ensure that they are well thought out, documented, and communicated across teams.

Qualifications:

Minimum Qualifications
- Bachelor's or BS degree, Master's degree, or PhD in a relevant technical field, or equivalent experience as per business requirements.
- Minimum of 14 years of experience with a Bachelor's degree, 12 years with a Master's degree, or 8 years with a PhD in a technical domain relevant to this role.
- Proven track record of delivering technical innovations and solving complex problems with significant impact on company-wide or industry-level outcomes.
- Recognized expertise demonstrated through patents, publications, or leadership roles in industry forums.
- Strong ability to influence strategy and guide technical direction across diverse teams and business units.
- Direct experience defining GPU AI Software Architecture.

Preferred Qualifications
- Demonstrated experience as a technical leader, inspiring and mentoring others to achieve their highest potential.
- Outstanding communication skills, with the ability to translate complex technical concepts into actionable insights for stakeholders at all levels.
- Recognized as an industry thought leader, with evidence of external recognition such as keynote presentations, advisory roles, or professional awards.
- Proven ability to foster collaboration across organizational boundaries, leveraging diverse perspectives to achieve groundbreaking results.

We invite you to bring your visionary expertise, bold ideas, and passion for innovation to Intel. Join us in shaping the future of technology and making a difference on a global scale.

Job Type:

Experienced Hire

Shift:

Shift 1 (United States of America)

Primary Location:

US, California, Santa Clara

Additional Locations:

US, Arizona, Phoenix, US, California, Folsom, US, Oregon, Hillsboro

Posting Statement:

Position of Trust

Benefits

Annual Salary Range for jobs which could be performed in the US: $999.00-$999,999.00

Work Model for this Role

Job Details:

Job Description:

About the Group

Intel is transforming from an Integrated Device Manufacturer (IDM) to a leading global foundry service provider, offering world-class manufacturing capabilities to external customers worldwide. Our Manufacturing Development and Customer Engineering (MDCE) organization is at the forefront of this transformation-focusing on technology customization, yield improvement, performance optimization, and exceptional customer delivery.

About the Role
We are seeking a highly accomplished Senior Principal Device Design Engineer with broad semiconductor industry expertise to drive the high-level architecture, definition, and optimization of next-generation and high-volume manufacturing (HVM) semiconductor technologies. In this strategic technical leadership role, you will apply a deep mastery of semiconductor device physics to define technical roadmaps and ensure world-class performance across a diverse range of applications-including advanced logic, SRAM, low-power mobile, analog, and mixed-signal designs.
Serving as a primary technical bridge between Process Integration, Yield, and Module Engineering, and collaborative product partners, you will establish the technical direction, target validations, and silicon-to-simulation accuracy across Intel's diverse technology portfolio.

Key Responsibilities:

Technical Strategy and Architecture Leadership: Lead cross-functional, multi-disciplinary teams in defining base and derivative semiconductor architectures-including advanced transistors, interconnects, and design rules-tailored for high-performance logic, low-power, memory, analog, and mixed-signal applications.
Technical Partner and Customer Engagement: Partner directly with external customers, product design teams, and internal engineering groups to understand complex product requirements, resolve circuit-level performance/reliability/leakage trade-offs, and translate product needs into tailored silicon solutions.
Technology Customization and Optimization: Drive the development and implementation of customized semiconductor features across logic and memory technologies, ensuring seamless integration with existing manufacturing processes and platforms to support specialized applications.
Silicon-to-Simulation Readiness: Set and govern device and interconnect performance targets, evaluating silicon-to-simulation health, model readiness, and design feasibility for large-volume manufacturing.
Cross-Functional Integration: Serve as the authoritative technical interface bridging Process Integration, Process Module, Device Physics, Yield Engineering, and Product Design to coordinate complex technology handoffs and resolve system-level constraints.
Design Rule and Waiver Governance: Direct the validation and strategic waiver management processes for advanced design rules, balancing strict manufacturing compliance and yield with product design flexibility.
Advanced Data Analytics: Guide the evaluation of electrical test (E-test) and yield data using advanced statistical methods and data analysis techniques to translate experimental silicon data into actionable process and design intelligence.
Mentorship and Industry Thought Leadership: Provide senior technical mentorship to engineers and researchers across the organization, stay ahead of emerging semiconductor industry trends, and foster a culture of technical excellence and customer-centric innovation.

Required Skills and Experience:

Progressive experience in the semiconductor industry with a strong focus on CMOS device physics, device design, and semiconductor technology development.
Leadership and Technology Integration: Demonstrated technical leadership within the semiconductor industry, specifically leading cross-functional teams to define, develop, and deliver advanced semiconductor technologies (covering logic, memory, or integrated architectures) and design rules into High-Volume Manufacturing (HVM).
Design Rule Governance: Deep proficiency in design rule development, validation, and waiver management processes, with a strong understanding of how layout constraints impact product yield.
Data and Analytical Mastery: Proven expertise in statistical data analysis, Design of Experiments (DOE), and data interpretation to evaluate test chip, E-test, and yield trends.

Preferred Skills and Experience

Advanced and Specialty Node Expertise: Architectural experience in advanced-node transistor design and scaling, with deep experience in specialized semiconductor customization for low-power, analog, mixed-signal, and memory technologies.
Physical Verification and Mask Flows: High-level familiarity with physical verification flows, Design Rule Checker (DRC) development, and mask generation concepts.
Manufacturing and SPC: Extensive experience in a High-Volume Manufacturing (HVM) environment with a focus on statistical process control (SPC) and yield monitoring.
Executive Communication: Exceptional verbal and written communication skills, with a demonstrated ability to influence executive stakeholders and guide collaborative partners through complex technical trade-offs.

Qualifications:

Master's degree in Electrical Engineering, Physics, Material Science, or a related field. PhD preferred
15+ years of relevant semiconductor device and technology development experience.

Job Type:

Experienced Hire

Shift:

Shift 1 (United States of America)

Primary Location:

US, Oregon, Hillsboro

Additional Locations:

US, Arizona, Phoenix, US, California, Santa Clara

Posting Statement:

Position of Trust

Benefits

Annual Salary Range for jobs which could be performed in the US: $265,480.00-374,800.00 USD

Work Model for this Role

Job Details:

Job Description:

The Role and Impact

As a Module Engineering Manager, you will lead a team of engineers to support high-volume manufacturing processes and drive advancements within Intel's next-generation packaging technologies. You will oversee daily operations, facilitate continuous improvement initiatives, and execute engineering strategies that enhance safety, quality, and productivity. Your leadership will play a pivotal role in enabling Intel to deliver innovative, industry-leading products while fostering a collaborative and inclusive work environment.

Business group

Intel Corporation's Wafer Packaging Manufacturing (WPM) organization focuses on developing and sustaining advanced manufacturing processes to support Intel's high-volume production goals. This group plays a key role in enabling Intel's innovative packaging and semiconductor technologies, contributing to operational excellence, quality improvements, and cost efficiencies across Intel's global manufacturing network.

Key Responsibilities

Lead and manage a team of engineers to support safe, high-volume manufacturing processes while driving continuous improvements in quality, output, cost, and yield.
Provide tactical direction and prioritize activities for sustaining operations, systematic troubleshooting, and process optimization.
Collaborate with cross-functional engineering and manufacturing teams to address integrated process and equipment challenges.
Develop and mentor engineers, cultivating technical expertise, leadership skills, and long-term growth opportunities within the team. You will also need to develop hands on technical expertise in the modules you own in order to drive the deep technical improvement projects required to drive the team to success.
Facilitate technology transfer and ensure matched processing across global sites through training sessions and audits.
Oversee the installation, qualification, and ramp production of Early Tool Sets during factory transitions.
Mentor and develop an internal technical team to facilitate the qualification and ramp of next generation Die Pick toolsets.
Develop and execute long-term strategies to enhance engineering capabilities and meet evolving manufacturing requirements.
Drive results through effective decision-making, goal setting, differentiated performance management, and maintaining accountability.
Champion a culture of innovation, inclusion, and disciplined execution to achieve operational excellence.

Qualifications:

Minimum Qualifications

Bachelor's degree in engineering, materials science, physics, or a related technical field with 6+ years of relevant experience.
Relevant experience should include the following:
- 2+ years experience leading an engineering or manufacturing team with demonstrated ability to lead teams, manage performance, and drive results in alignment with organizational goals.
- Experience in process characterization, troubleshooting, and process improvement within a high-volume manufacturing environment.
- Experience with manufacturing practices and lean manufacturing principles.

Preferred Qualifications

4+ years experience with a Master's degree, or 2+ years of experience with a PhD.
Extensive experience leading engineering teams with a focus on operational excellence and innovation.
Advanced knowledge of semiconductor processing or packaging technologies.
Proven ability to collaborate with vendors and drive cross-functional results.
Exceptional communication and leadership skills with a track record of inspiring and empowering diverse teams.
Success in developing and implementing strategic plans to enhance engineering capabilities and future manufacturing efficiency.

We are seeking an energetic and visionary leader committed to driving innovation, achieving results, and fostering a vibrant and inclusive work environment. Bring your expertise to Intel and help shape the future of technology.

Job Type:

Experienced Hire

Shift:

Shift 1 (United States of America)

Primary Location:

US, New Mexico, Albuquerque

Additional Locations:

Posting Statement:

Position of Trust

N/A

Benefits

Annual Salary Range for jobs which could be performed in the US: $120,860.00-231,670.00 USD

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

Job Details:

Job Description:

Intel's Neuromorphic Computing Lab has been at the forefront of brain-inspired computing for nearly a decade, working alongside a global ecosystem of 250+ research groups. Our groundbreaking Loihi series research chips have pioneered event-driven, sparse, and massively parallel neuro-inspired processing, resulting in over 100 peer-reviewed publications. As part of Intel's CTO Office, we're now transforming these research breakthroughs into real-world products that will power the next generation of physical AI systems.

We are seeking a Neuromorphic AI Research Scientist to advance state-of-the-art neuromorphic processor technology toward commercial adoption. This role focuses on modeling, prototyping, and defining architectures and algorithms that enable transformative gains for real-world customer applications in edge computing, signal processing, and autonomous systems.

Key Responsibilities

Design and analyze neuromorphic AI algorithms for robotics, signal processing, control, and learning on edge platforms
Develop research-quality software artifacts including APIs, kernels, and benchmarking tools that enable collaborative innovation
Prototype and evaluate approaches under realistic constraints including quantization, sparsity, memory footprint, latency, and energy optimization
Collaborate with hardware and software engineering teams to translate algorithmic requirements into hardware specifications
Build experimental pipelines and benchmarks for target use cases with comprehensive baseline and ablation studies
Communicate results through technical documentation, customer prototypes, and publications in leading conferences and journals
Contribute to technical thought leadership in neuromorphic computing and present findings to internal and external stakeholders

As a successful candidate, you must possess

Innovative Problem-Solving: Skills to approach complex challenges with creative, out-of-the-box thinking
Collaborative Leadership: Strong interpersonal skills to work effectively across diverse, multidisciplinary teams
Adaptability: Flexibility to navigate the dynamic landscape of emerging AI technologies
Communication Excellence: Skills to articulate complex technical concepts to both technical and non-technical audiences
Results-Oriented Mindset: Drive to translate research innovations into practical, commercial solutions
Intellectual Curiosity: Passion for continuous learning and staying at the cutting edge of neuromorphic computing

Join Intel's pioneering team and help define the next wave of AI technology that will transform industries and create new possibilities. Apply today to be part of this groundbreaking journey from research to real-world impact.

Qualifications:

Minimum Qualifications:

- PhD (or equivalent research experience) in Computational Neuroscience, Computer Science, Electrical Engineering, Applied Mathematics, Robotics, or a related field.

- 1+ projects demonstrating the skills to turn research ideas into working prototypes and to evaluate them rigorously (benchmarks, baselines, ablations, quantitative reporting).

- 3+ publications in leading journals or conferences on AI/ML, edge computing, robotics, and/or control.

- 2+ years of experience with:

State-of-the-art AI models, optimization, and at least one of: control/dynamical systems, signal processing, or probabilistic inference.
Scientific programming for research (e.g., Python or C/C++) including experience with software development best practices (OO design, testing, debugging, documentation, version control, code reviews).

Preferred Qualifications:

- Track record of open-source releases or widely used internal libraries; skills to write high-impact technical narratives (e.g., position papers).

- 1+ years of experience with:

Strong mathematical background.
Edge AI HW accelerators or event-based sensors.
Quantization and computations with low-precision arithmetic.
Developing software for robotics or other real-time control systems.
Building performant components in a systems language (e.g., C/C++/assembler) or equivalent performance-oriented environment.
Profiling and benchmarking algorithms and hardware architectures.
Hardware architecture and design experience.

Job Type:

Experienced Hire

Shift:

Shift 1 (United States of America)

Primary Location:

US, California, Santa Clara

Additional Locations:

US, Arizona, Phoenix, US, California, Folsom, US, Oregon, Hillsboro, US, Texas, Austin

Posting Statement:

Position of Trust

N/A

Benefits

Annual Salary Range for jobs which could be performed in the US: $170,500.00-315,490.00 USD

Work Model for this Role

Job Details:

Job Description:

The Role and Impact As an AI/ML Software Engineering Graduate Intern, you will contribute to the design, development, and optimization of cutting-edge AI solutions for semiconductor design and engineering workflows. Working at the intersection of Artificial Intelligence/Machine Learning (AI/ML), Electronic Design Automation (EDA), and software engineering, you will research and prototype intelligent solutions that enable smarter design flows, accelerate automation, and improve engineering efficiency. You will gain hands-on experience developing and tuning ML models, exploring Agentic AI and autonomous workflows, and integrating AI capabilities into scalable engineering and production environments. Business group You will be joining the Central Engineering Group (CEG), a dynamic team that drives Intel's engineering excellence across diverse domains. This organization focuses on creating innovative solutions that support Intel's global business goals, with an emphasis on collaboration, technical expertise, and impactful projects. As part of the team, you'll have the opportunity to contribute to Intel's mission of shaping the future of technology. Key Responsibilities - Research, design, and prototype AI/ML-driven solutions for semiconductor and EDA challenges. - Develop, implement, and optimize AI/ML models for performance, accuracy, and engineering efficiency. - Explore advanced AI techniques, including Agentic AI, to create autonomous and intelligent engineering workflows. - Develop software frameworks, automation, and AI-enabled solutions that support scalable engineering workflows. - Collaborate with global product and engineering teams to integrate AI/ML capabilities into production workflows. - Support applied research, hardware-software integration, and system-level deployment of AI technologies. - Analyze experimental results and identify opportunities to improve AI models, design flows, and automation. - Gain hands-on experience across AI/ML, software engineering, EDA, and semiconductor design.

Qualifications:

Qualifications: Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Minimum Qualifications: - Currently pursuing a Master's degree OR PhD in Electrical Engineering, Computer Engineering, Computer Science or any related field. - Solid understanding of AI/ML fundamentals and algorithms. - Strong programming skills in Python (preferred), with familiarity in Unix/Linux. - Good understanding of software engineering principles (data structures, object-oriented design). - Excellent communication skills and fluency in English. Preferred Qualifications: - Knowledge of ASIC design flows, Physical Design, and Design Automation. - Practical experience applying Machine Learning in EDA or related domains. - Familiarity with Agentic AI concepts and ability to design autonomous flows. - Strong foundation in VLSI Design. - Good code development practices and ability to write clean, maintainable code. Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.

Job Type:

Student / Intern

Shift:

Shift 1 (Germany)

Primary Location:

Germany, Munich

Additional Locations:

Posting Statement:

Position of Trust

N/A

EU Salary

We offer a total compensation package that ranks among the best in the industry.

The minimum Annual Salary for this job which could be performed in Germany is: 28 920,00 €

The job posting reflects the minimum base compensation for this role. Our standard internship rates are aligned with the specific job role and degree level. As part of our total compensation approach, the final offer may also include additional pay components and benefits. Your recruiting team will provide the confirmed base salary along with any applicable total compensation elements upon employment offer delivery.

Work Model for this Role

eb:T16cc,

Job Details:

Job Description:

The Role and Impact:

As a SoC Functional Validation Engineer, you will play an integral role in ensuring the quality and reliability of Intel's state-of-the-art System-on-Chip (SoC) solutions. In this position, you will define, develop, and execute validation plans for integrated SoCs, focusing on post-silicon validation, debugging, and optimization. Through collaboration with cross-functional teams, your contributions will directly impact the performance and functionality of Intel products, driving innovation and excellence in the industry.

Business Group:

The Data Center Group (DCG) is at the forefront of developing cutting-edge technologies that enable high-performance computing and data-driven solutions. DCG focuses on creating advanced products and systems that power cloud, enterprise, and AI applications. By joining our team, you will contribute to Intel's broader mission of providing world-class solutions that shape the future of technology and computing.

Key Responsibilities:

- Develop and execute post-silicon validation plans to ensure compliance with design specifications and requirements.
- Perform functional validation for integrated SoCs, focusing on IP integration, system-level features, and interaction between components.
- Collaborate with architects, RTL designers, firmware teams, and other engineering groups to understand system-level requirements and features.
- Design and implement directed and random test cases to validate hardware/software interactions and ensure functional coverage closure.
- Debug SoC failures, identify root causes, and implement solutions or workarounds as required.
- Utilize tools such as Python, C, or C++ for test development and automation scripting.
- Analyze and modify test results, adapt test codes, and address coverage gaps to improve validation accuracy.
- Prepare and track validation requirements in collaboration with firmware, hardware, and platform teams.
- Develop and optimize validation methodologies, tools, and automation frameworks to streamline testing processes.
- Participate in project meetings, provide regular status updates, and escalate critical issues to management and stakeholders.
- Contribute to the development of new validation tools and methodologies, offering feedback and technical inputs for improvement.

Qualifications:

Minimum Qualifications:

- Bachelor's degree in Electronics, Electrical, or Computer Engineering, or related field, with 0-1 years of relevant experience in validation, test development, or debugging. Alternatively, a Master's degree in the relevant field with no prior professional experience.
- Proficiency in Python, C, or C++ for test content creation and automation scripting.
- Strong understanding of computer architecture, microarchitecture, and operating system concepts.
- Experience with pre-silicon platforms such as emulators or Virtual Prototypes for test code development.
- Demonstrated ability to debug software and hardware issues, identify root causes, and provide effective solutions.
- Knowledge of system hardware/software validation techniques and methodologies.
- Familiarity with data visualization tools (e.g., Power BI) for reporting metrics and tracking progress.

Preferred Qualifications:

- Solid understanding of x86 architecture and its interactions with hardware and software components.
- Hands-on experience with silicon debug tools, failure analysis methods, or system-level validation infrastructure.
- Familiarity with AI-driven workflows or tools for test plan development and analysis.
- Excellent analytical, problem-solving, and communication skills, with strong attention to detail.
- Ability to work independently and collaboratively within a cross-functional team environment.
- Enthusiasm for innovation and advancing validation processes through new methodologies and tools.

Join us at Intel and contribute to shaping the future of semiconductor technology. Be part of a team that values innovation, collaboration, and excellence-apply today.

Job Type:

Intel Contract Employee

Shift:

Shift 1 (India)

Primary Location:

India, Bangalore

Additional Locations:

Posting Statement:

Position of Trust

N/A

Work Model for this Role

Job Details:

Job Description:

Business group

Intel Integrated Photonics Solutions (IPS), part of the Data Center Group, is a leader in silicon photonics integration. Our team drives innovation through advanced technology and scalable, high-volume manufacturing of silicon photonics products. We are committed to developing next-generation optical connectivity solutions that enable continued data center bandwidth growth through smaller form factors, co-packaged optics, and data rates scaling from 400G today to 3.2T and beyond.

The Role and Impact

We are seeking a highly motivated Senior Analog Design Engineer to join our growing team and help accelerate the development of industry-leading silicon photonics solutions. As a Senior Analog Design Engineer, you will contribute to the Silicon Photonics Solutions Group's mission of transforming data center connectivity and strengthening Intel's leadership in networking technologies.

In this role, you will be responsible for:

The architecture, design, implementation, and validation of high-speed analog and mixed-signal integrated circuits used in advanced optical interconnect products.
You will collaborate closely with cross-functional design teams to deliver innovative solutions from concept through production.
Define circuit architectures and develop designs that meet power, performance, and functionality requirements for next-generation optical interconnects.
Lead block-level design and collaborate with multidisciplinary teams to deliver key integrated circuit components.
Architect, design, and validate high-speed, low-voltage, low-power analog and mixed-signal integrated circuits.
Work closely with digital design teams to ensure successful integration and product execution.
Plan and execute design activities while balancing performance, schedule, and quality objectives.
Guide to the development of post-silicon test and characterization plans.
Create and maintain comprehensive design documentation, including design specifications, reviews, and technical reports.

Qualifications:

Minimum Qualifications:
M.S. degree in Electrical Engineering or a related field with 4+ years of industry experience or PhD & 2+ years in the following:

Hands-on experience designing high-speed circuit blocks such as amplifiers, drivers, equalizers, PLLs, phase interpolators, and clock and data recovery (CDR) circuits for data rates of 32 Gbps and above.
Experience designing inductors, transmission lines, transimpedance amplifiers (TIAs), and optical modulator drivers.
Strong expertise in high-speed serial link design and analog CMOS/BiCMOS circuit design using deep-submicron process technologies.
Experience with full-chip integration, ESD design considerations, and verification methodologies.

Preferred Qualifications:

Familiarity with optical communication systems.
Experience developing 400G, 800G, and 1.6T optical links.
Experience with package design and test setup development.
Experience designing precision analog circuits such as ADCs and DACs.
Experience with PAM4 and NRZ link architectures.
Strong understanding of mixed-signal design methodologies and flows.
Excellent written and verbal communication skills.

Job Type:

Experienced Hire

Shift:

Shift 1 (United States of America)

Primary Location:

US, California, Santa Clara

Additional Locations:

Posting Statement:

Position of Trust

N/A

Benefits

Annual Salary Range for jobs which could be performed in the US: $141,910.00-269,100.00 USD

Work Model for this Role

Job Details:

Job Description:

The Role and Impact
As a CVE Validation Graduate Talent, you will play a critical role in ensuring the functionality and quality of Intel's next-generation CPUs, PCH chipsets, and custom ASICs. You will be directly involved in developing test plans, creating validation environments, and executing validation methodologies to identify design implementation bugs. This role provides an exciting opportunity to contribute to high-quality products in market segments like Client Computing while gaining hands-on experience in advanced system validation techniques.

Business Group
The Silicon and Platform Engineering Group (SPE) is dedicated to delivering innovative hardware and software solutions that drive Intel's leadership in technology and performance. Within SPE, the CVE Validation team focuses on silicon-level hardware validation, ensuring the reliability and quality of Intel's products across diverse market segments. Join a dynamic team that supports Intel's broader mission to engineer impactful technology solutions for the world.

Key Responsibilities
- Develop and execute test plans to validate architectural features of next-generation designs.
- Create, define, and refine system validation environments and test suites.
- Use emulation and platform-level tools to ensure design performance meets specifications.
- Debug failures and contribute to the development of validation methodologies.
- Work across system areas such as memory controllers, power management, PCIe, USB, Serial IO, graphics, media, audio, and more.

Qualifications:

Minimum Qualifications
- Bachelor's degree in Computer Science, Computer Engineering, Electrical Engineering, or a related field with 0-1 years of hands-on experience in the domain, demonstrated through internships, academic projects, coursework, or hands-on training. Or,
- Master's degree in relevant field with no prior professional experience.
- Proficiency in C programming.
- Basic scripting knowledge (e.g., Python, Perl) is advantageous.
- Fundamental understanding of CPU architecture, operating systems (e.g., Windows, Linux, Android, RTOS), and hardware interfaces like PCIe, USB, and memory controllers.

Preferred Qualifications
- Strong interest in software infrastructure and tools development.
- Self-motivated with a creative mindset and ability to thrive in fast-paced, collaborative environments.
- Excellent communication and interpersonal skills.
- Previous experience contributing to digital design or logic validation.

Embark on a career where your skills and passion will drive innovation, enabling you to shape the future of technology with Intel. We are excited to welcome talented individuals who are ready to push boundaries and make a meaningful impact.

Job Type:

Intel Contract Employee

Shift:

Shift 1 (Malaysia)

Primary Location:

Malaysia, Penang

Additional Locations:

Posting Statement:

Position of Trust

N/A

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

Job Details:

Job Description:

About the role

Be the technical face of Intel's Edge Agentic AI and Physical AI (PhyAI) solutions for customers across Saudi Arabia and the broader MENA region.

As a Solution Engineer, you will help city authorities, critical infrastructure operators, and government organizations design, deploy, and scale next-generation AI solutions for cognitive cities, autonomous operations, and intelligent edge-driven decision making.

Your work will contribute directly to the Kingdom's transformation under Saudi Vision 2030 and the National Strategy for Data and AI (NSDAI).

This role sits at the intersection of advanced engineering and customer engagement. You will deliver technical demonstrations, architect and execute proofs of concept, validate edge AI and agentic workflows, and drive customer success across the full AI lifecycle.

Working closely with city, government, and AI solutions stakeholders, you will gather field insights, shape solution roadmaps for the region while working with Intel's global product, and ecosystem organizations.

What you'll do

Guide customers from initial discovery through successful deployment of agentic AI and Physical AI solutions powered by Intel technologies.

Partner with Saudi and GCC customers to understand their use cases and enable solutions on Intel hardware accelerating the adoption of Edge Agentic and Phy AI.

Run technical demos, workshops, and proofs of concept at customer sites.

Produce customer-facing technical content in both Arabic and English: solution briefs, deployment guides, demo scripts, and case studies.

Bring field signal back to the Edge & Phy AI product teams.

Qualifications:

Required Qualifications

Bachelor's degree in Computer Science, Software Engineering, Information Systems, or a related technical field.

At least 5-6 years of experience in a technical role — software engineering, solutions engineering, technical consulting, or technical support with a strong engineering component.

Strong Knowledge of computer vision, video analytics, sensor fusion, IoT, geospatial intelligence, or real-time operational technologies (OT).

Strong understanding of edge AI solutions, AI & agentic AI frameworks such as vLLM,OVMS, LangGraph, LangChain, and LlamaIndex.

Strong understanding of Agentic AI, multi-agent systems, and AI orchestration frameworks.
Hands-on developer capable of building agentic AI workflows, RAG systems, computer vision pipelines, integrations, APIs, and customer PoCs.

Experience in Python, SQL, JavaScript/TypeScript, Bash, PyTorch, TensorFlow, ONNX.

Experience with microservices development and frameworks as Kubernetes and OpenShift.

Ability to translate complex technical capabilities into measurable business outcomes.

Fluent in both Arabic and English — able to lead a customer meeting, deliver a technical presentation, and write documentation in either language.
Willingness to travel within Saudi Arabia and occasionally within the MENA region for client visits

Preferred Qualifications

Experience deploying Edge AI workloads and across distributed edge architectures.

Understanding of Cognitive City, Intelligent Infrastructure, Critical Infrastructure use cases across transportation, public safety, utilities, energy, healthcare, or smart buildings

Familiarity with sovereign AI architecture, data governance, AI lifecycle management (MLOps/AIOps), and secure AI deployments

Prior customer-facing experience at a technology company, system integrator, consulting firm within the MENA region

Contributions to AI, edge computing, open-source, or developer communities through technical blogs, GitHub projects, conference presentations, workshops, or hackathons

Why join us

Be a founding member of Intel's customer success engineering presence in Saudi Arabia, working with the Kingdom's most ambitious AI customers.

Hands-on technical role with direct customer impact — see your work shipped into production at scale.

Mentorship from senior engineers and customer success leaders, with structured early-career development.

Competitive compensation, travel support, and Intel's standard benefits package adapted for the Saudi market.

Job Type:

Experienced Hire

Shift:

Shift 1 (Saudi Arabia)

Primary Location:

Saudi Arabia, Riyadh

Additional Locations:

Posting Statement:

Position of Trust

N/A

Work Model for this Role

ef:T1775,

Job Details:

Job Description:

About the role

Join Intel's Edge Agentic AI team and help accelerate the Kingdom's AI transformation under Saudi Vision 2030. This role sits at the intersection of advanced AI engineering, customer solution architecture, and ecosystem engagement.

You will work directly with government entities, smart city authorities, critical infrastructure operators, enterprises, and ecosystem partners to design, deploy, and scale next-generation Edge Agentic and Physical AI powered by Intel technologies.

As a trusted technical advisor, you will bridge customer requirements with Intel's global engineering teams, helping customers operationalize Agentic and Physical AI and autonomous decision-making systems with sovereign AI across edge infrastructures.

What you'll do

Lead the design and architecture of end-to-end solutions for Edge Agentic AI, Physical AI, and Cognitive City initiatives across Saudi Arabia and the broader region.

Engage customers/stakeholders to understand business goals, operational challenges, and AI transformation priorities, translating them into scalable technical solutions.

Develop and demonstrate proof-of-concepts showcasing sovereign edge AI architectures leveraging Intel HW & SW technologies.

Create customer-facing technical assets, including solution blueprints, reference architectures, deployment guides, workshop content, and technical presentations in both Arabic and English.

Collaborate closely with Intel engineering and product teams to influence product roadmaps through customer requirements, field insights, and deployment feedback.

Drive ecosystem development and strategic partnerships with public and private sector.
Represent Intel as a technical leader in customer engagements, partner workshops, industry forums, and Vision 2030 initiatives, including events such as LEAP and the Global AI Summit.

Qualifications:

Required Qualifications

Bachelor's degree in Computer Science, Software Engineering, Electrical Engineering, AI, Data Science, or related technical discipline.

At least 5-6 years of experience in Solution Engineering, AI Engineering, Software Engineering, Technical Consulting, or Customer Engineering.
Strong software development background with ability to code, review architecture, and guide engineering teams.

Strong experience in Python, SQL, JavaScript, Docker and Vector Databases.

Strong understanding of: Edge AI architectures, Agentic AI systems, Multi-agent frameworks, and AI orchestration & lifecycle management frameworks.

Experience in REST APIs, microservices development and orchestration frameworks (e.g., Kubernetes, OpenShift).

Familiarity with AI frameworks as LangGraph, LangChain, LlamaIndex, AI model serving frameworks such as vLLM and OVMS, and MCP-based agent architectures.

Ability to translate technical capabilities into measurable business outcomes.

Excellent communication and presentation skills with proficiency in Arabic and English.
Willingness to travel within Saudi Arabia and occasionally within the MENA region for client visits

Preferred Qualifications

Experience deploying AI workloads in distributed edge environments.

Knowledge of Cognitive Cities, Physical AI, Industry 4.0, transportation, public safety, utilities, healthcare, energy, or intelligent infrastructure domains.

Familiarity with: Sovereign AI architectures and AI governance

Experience with digital twin platforms and geospatial intelligence solutions.

Experience working with government or public-sector customers in the Middle East.

Open-source contributions, technical blog posts, or participation in regional AI / developer communities (e.g., SDAIA, Saudi AI Society, GCC tech meetups)

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Why join us

Help shape the future of Cognitive Cities, Edge Agentic AI, and Physical AI across Saudi Arabia and the ME region.

Influence strategic customer deployments that support Vision 2030 initiatives.

Gain exposure to emerging technologies spanning AI agents, digital twins, robotics, autonomous operations, and sovereign AI platforms.

Competitive compensation, relocation support where applicable, and Intel's standard benefits package adapted for the Saudi market

Job Type:

Experienced Hire

Shift:

Shift 1 (Saudi Arabia)

Primary Location:

Saudi Arabia, Riyadh

Additional Locations:

Posting Statement:

Position of Trust

N/A

Work Model for this Role

f0:T253e,

Job Details:

Job Description:

The Role and Impact:
Intel is seeking a motivated and experienced SoC Validation Engineer to join our Power Management Validation team. In this role, you will be responsible for validating power management architectures and features that enable Intel's next-generation products. You will play a critical role in ensuring design quality, functionality, and power efficiency by developing innovative validation strategies, executing comprehensive test plans, and driving debug activities across complex SoC designs.

As a SoC Power Management Validation Engineer, you will work closely with architecture, design, and verification teams to validate key power management features including Dynamic Voltage and Frequency Scaling (DVFS), power gating, clock gating, reset flows, low-power states, thermal management, and telemetry. You will contribute to the development of advanced validation environments, uncover design issues early in the development cycle, and drive solutions that improve product quality and readiness. This position offers an opportunity to influence future Intel products while expanding your technical leadership and validation expertise.

Business group:
You will be joining Intel's Data Center Group (DCG), a global leader in designing and delivering cutting-edge technologies that drive data center innovation and transformation. The group specializes in developing high-performance solutions to accelerate computing, storage, and networking capabilities, supporting Intel's mission to power the world's digital infrastructure.

Key Responsibilities:
- Develop and execute comprehensive validation plans to ensure power management features meet architectural and functional specifications.
- Design, develop, and maintain validation environments, automated test content, and debug infrastructure for power management validation.
- Validate critical power management features including: Dynamic Voltage and Frequency Scaling (DVFS), Power Gating and Clock Gating, Low-Power States and Power State Transitions, Reset and Power Sequencing, Thermal Management Features, Telemetry and Monitoring Logic.
- Develop validation content and infrastructure using industry-standard methodologies and tools such as SystemVerilog, UVM, simulation, and emulation platforms.
- Execute simulation and emulation workloads to validate design functionality and identify issues early in the product development cycle.
- Analyze validation results, coverage metrics, and performance data to improve design quality and validation effectiveness.
- Drive root cause analysis, debug, and resolution of complex design issues in collaboration with architecture, RTL design, and verification teams.
- Develop and maintain automation frameworks, regression environments, dashboards, and data analysis tools to improve validation efficiency and coverage.
- Review architecture specifications and design changes to assess validation impact and ensure comprehensive feature coverage.
- Contribute to validation methodology improvements and best practices across multiple product generations.
- Mentor junior engineers and provide technical leadership on complex validation and debug challenges.
- Continuously explore new technologies, automation techniques, and AI-assisted solutions to improve execution and outcomes.

Qualifications:

Minimum Qualifications:
- Bachelors & 6+ years or Masters & 4+ years or PhD & 2+ years degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field.

- 10+ years of experience in pre-silicon validation, functional validation, design verification, or silicon validation.

- Strong understanding of digital design fundamentals, computer architecture, and SoC design concepts.

- Strong knowledge of SystemVerilog and UVM-based validation methodologies.

- Experience with simulation or emulation environments, debugging and root-cause analysis skills.

- Knowledge in Python or Perl or Shell, or similar scripting languages.

Preferred Qualifications:
- Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field.

- Experience validating power management architecture and features in complex SoC designs, such as: Dynamic Voltage and Frequency Scaling (DVFS), Power Gating, Clock Gating, Low-Power State Management, Reset and Power Sequencing, Thermal Management Features.

- Experience developing validation plans, test content, and coverage-driven validation strategies.

- Experience in one or more of the following areas: Functional Validation, Design Verification, Coverage-Driven Verification, Emulation-Based Validation, Low-Power Verification Methodologies, Reset Validation, Power State Validation, Telemetry Feature Validation.

- Familiarity with assertion-based verification, formal verification, and advanced validation automation techniques.

- Demonstrated ability to lead technical initiatives and mentor engineers.

- Strong collaboration skills and ability to work effectively across architecture, design, and validation teams.

- Experience leveraging AI and advanced analytics to improve validation productivity and quality.

- Passion for innovation, continuous improvement, and technical excellence.

- Excellent analytical, problem-solving, and communication skills.

Your expertise and enthusiasm for cutting-edge technology will make a tangible difference in shaping the future of data center innovation. Join us and be part of a team that drives meaningful change and delivers world-class solutions to customers across the globe.

Job Type:

Experienced Hire

Shift:

Shift 1 (United States of America)

Primary Location:

US, California, Folsom

Additional Locations:

US, California, Santa Clara, US, Oregon, Hillsboro

Posting Statement:

Position of Trust

N/A

Benefits

Annual Salary Range for jobs which could be performed in the US: $164,470.00-269,100.00 USD

Work Model for this Role

Job Details:

Job Description:

The Role and Impact
As a CVE Validation Graduate Talent, you will play a pivotal role in ensuring the functionality and reliability of Intel's next-generation CPUs, PCH chipsets, and custom ASICs. You will develop and execute test plans, validate architectural features, and debug failures to deliver high-quality and dependable products to market. Your day-to-day responsibilities will include working on diverse system areas such as power management, PCIe, USB, memory controllers, and media interfaces, shaping Intel's future technology landscape.

Business Group
The Silicon and Platform Engineering Group (SPE) is at the forefront of Intel's innovation, focusing on delivering high-performance silicon solutions that drive advancements in computing technology. This group plays a critical role in designing and validating cutting-edge products, ensuring Intel remains a leader in the industry. SPE's mission is to support Intel's broader goals by developing and validating silicon architectures that power a variety of market segments, including client computing and beyond.

Key Responsibilities
- Develop and execute test plans and validation methodologies for architectural features of next-generation designs.
- Create, define, and develop system validation environments, tools, and test suites.
- Perform silicon-level hardware architectural validation and debug failures during system-level testing.
- Collaborate with cross-functional teams to ensure compliance with specifications and enhance product reliability.
- Utilize emulation and platform-level tools to validate system performance and functionality.
- Work on diverse system areas such as memory controllers, power management, PCIe, USB, TCSS, Serial IO, graphics, media, and audio.

Qualifications:

Minimum Qualifications
- Bachelor's degree in Computer Science, Computer Engineering, Electrical/Electronics Engineering, or a related field, with 0-1 years of hands-on experience in validation, gained through internships, academic projects, coursework, or hands-on training. OR
- Master's degree in Computer Science, Computer Engineering, Electrical/Electronics Engineering, or a related field, with no prior professional experience.
- Proficiency in C programming.
- Basic knowledge of scripting languages such as Perl or Python.
- Fundamental understanding of CPU architecture, operating systems architecture (Windows/Linux/Android/RTOS).

Preferred Qualifications
- Familiarity with packet-based protocols such as PCIe, SPI, I2C, and others.
- Exposure to digital design or writing RTL in Verilog/SystemVerilog.
- Experience with debugging tools, emulators, or validation frameworks.
- Creative mindset, self-motivation, and a passion for software infrastructure and tools development.
- Strong analytical ability, communication skills, and adaptability to work in a fast-paced project schedule.
- Demonstrated ability to work both independently and collaboratively within a team.

Join us in shaping the future of computing technology at Intel. Your contributions will empower groundbreaking advancements that redefine the possibilities of client computing and beyond.

Job Type:

Intel Contract Employee

Shift:

Shift 1 (Malaysia)

Primary Location:

Malaysia, Penang

Additional Locations:

Posting Statement:

Position of Trust

N/A

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

Job Details:

Job Description:

Overview:

We are seeking a dynamic and passionate AI software engineer to join Intel's Data Center and AI group (DCAI). In this role, you will design and develop optimizations for high-performance AI serving and training frameworks such as SGLang, vLLM, and PyTorch. You will contribute to Intel's AI framework software stack and help enable and optimize state-of-the-art solutions for Intel's AI accelerators and next-generation GPUs. This position requires deep expertise in framework internals, scheduling, memory management, and kernel optimization for production AI workloads.

Roles and Responsibilities:

Design and develop custom GPU kernels for AI framework operations including attention mechanisms, collective operations, and computation primitives to optimize performance on Intel accelerators and GPUs.

Optimize and enhance framework components including scheduling, memory management, and execution pipeline architecture to improve throughput, latency, and resource utilization.

Write and integrate high-performance kernels using GPU programming frameworks to maximize throughput and minimize latency.

Identify and implement optimization opportunities in the framework stack for production AI workloads.

Collaborate with the open-source community (SGLang, vLLM, PyTorch, and others), participate in upstream development, and integrate new innovations into production software.

Debug and optimize complex multi-layered systems involving kernel execution, memory hierarchies, and distributed AI scenarios.

Qualifications:

Qualifications:

Bachelor's degree (B.Tech) or Master's degree (M.S./M.Tech) in Computer Science, Electronics and Communications Engineering (ECE), or a related field, with 6 to 12 years of professional experience.

Advanced proficiency in C++ (C++14/17) and intermediate skills in Python and parallel programming.

Proven, hands-on experience writing and optimizing GPU kernels. Demonstrated expertise in kernel development for machine learning operations such as GEMM, attention mechanisms (including Flash Attention), collective operations, and sampling.

In-depth, hands-on experience with AI frameworks—SGLang, vLLM, PyTorch, or similar production-grade serving and training systems. Deep understanding of their internal architecture, scheduling mechanisms, and memory management strategies is essential.

Strong knowledge of AI inference and training concepts including batching strategies, memory optimization, distributed execution, and performance tuning.

Practical experience optimizing and deploying AI models at scale in production environments.

Strong ability to debug complex issues in multi-layered software systems, performance profiling, and bottleneck identification in AI frameworks.

Solid understanding of computer architecture, GPU execution models, memory hierarchies, and hardware-software co-optimization techniques.

Experience working on frameworks and platforms that have been deployed to production with high availability and performance requirements.

Excellent communication skills and experience collaborating with cross-functional, geographically distributed teams.

Preferred Qualifications:

Extensive experience developing production-grade kernels with CUDA, CUTLASS, or Triton for various AI operations.

Published or open-source contributions demonstrating kernel optimization expertise.

Knowledge of compiler algorithms for heterogeneous systems and kernel fusion optimizations.

Contributions to or deep familiarity with SGLang, vLLM, PyTorch, or other open-source AI frameworks.

Experience with distributed AI workloads, multi-GPU scheduling, and optimization across heterogeneous hardware.

Understanding of quantization techniques, mixed-precision inference and training, and their integration into AI frameworks.

Job Type:

Experienced Hire

Shift:

Shift 1 (India)

Primary Location:

India, Bangalore

Additional Locations:

Posting Statement:

Position of Trust

N/A

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

Job Details:

Job Description:

The Role and Impact
Are you ready to contribute to the development of industry-leading processor technology? As a Graduate Talent in the Client Validation Engineering (CVE) Validation team, you will play a critical role in validating the functionality of next-generation designs across diverse system areas such as memory controllers, power management, PCIe, USB, graphics, media, and more. Your day-to-day responsibilities will include developing test plans, creating test content, defining system validation environments, and debugging failures to ensure the highest quality standards in Intel products.

Business Group
The Client Validation Engineering (CVE) team is part of Intel's Silicon and Platform Engineering (SPE) Group. This team specializes in post-silicon validation for Intel's cutting-edge CPUs, PCH chipsets, and custom ASICs, supporting Intel's goal of delivering high-quality and reliable products to markets such as Client Computing. Leveraging industry-standard and custom validation tools, CVE plays a pivotal role in ensuring Intel's innovations meet customer expectations and performance specifications.

Key Responsibilities
- Validate the functionality and performance of new architectural features in next-generation CPUs and chipsets.
- Develop test plans, test content, coverage points, and validation tools.
- Explore and validate multiple system areas, such as memory controllers, power management, PCIe, USB, graphics, and more.
- Define and execute system validation methodologies and test suites to ensure compliance with design specifications.
- Debug and resolve issues identified during validation processes.
- Utilize emulation and platform-level tools for performance validation.
- Collaborate with cross-functional teams to enhance product quality and reliability.

Qualifications:

Minimum Qualifications
- Bachelor's degree in Computer Engineering, Computer Science, Electronics Engineering, or Information Technology with 0-1 years of hands-on experience in domain with demonstrated skills gained through internships, academic projects, coursework, or hands-on training. OR
- Master's degree in Computer Engineering, Computer Science, Electronics Engineering, or Information Technology with no prior professional experience.
- Proficiency in C programming.
- Basic scripting knowledge using Python or Perl.
- Foundational understanding of CPU architecture, OS architecture, and operating systems such as Windows, Linux, Android, or RTOS.

Preferred Qualifications
- Demonstrated passion for software infrastructure and tools development.
- Familiarity with digital design concepts or experience with RTL coding and FPGA.
- Understanding of packet-based protocols such as PCIe, SPI, USB, and I2C.
- Strong problem-solving, analytical, and communication skills.
- Ability to work collaboratively in fast-paced, dynamic environments while managing tight project schedules.
- Self-motivated, creative thinker, and effective team player.

Join Intel and take the first step toward building an exciting and impactful career in technology. Collaborate with passionate peers, work on cutting-edge projects, and contribute to innovations that shape the future of computing.

Job Type:

Intel Contract Employee

Shift:

Shift 1 (Malaysia)

Primary Location:

Malaysia, Penang

Additional Locations:

Posting Statement:

Position of Trust

N/A

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. 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